Cirrus Logic AN131 - Manual (Page 9)

AN131
AN131REV2 9
; Setup 4 Settings - (A1-A0 = 00, Physical Channel = 3, OWR = 15Hz,
; input V-range = 25mV, Unipolar)
LDA #$4C ;Load ACCA with first byte of CSR #2
JSR send_spi ;Send byte number one
LDA #$01 ;Load ACCA with second byte of CSR #2
JSR send_spi ;Send byte number two
LDA #$05 ;Load ACCA with third byte of CSR #2
JSR send_spi ;Send byte number three
RTS ;Exit subroutine
;*****************************************************************************
;* Routine - calibrate
;* Input - none
;* Output - none
;* This subroutine instructs the CS5521/22/23/24/28 to perform a self-calibration on
;* Setup 1.
;*****************************************************************************
calibrate LDA #$81 ;Command for Self-Offset Cal, Setup 1
JSR send_spi ;Send Self-Cal command to ADC
poll_sdo1 BRSET 2,PORTD, poll_sdo1 ;Wait for SDO to fall
RTS ;Exit Routine
;*****************************************************************************
;* Routine - rwgain
;* Input - none
;* Output - contents of gain register on PC1 in HIGH, MID and LOW bytes
;* This subroutine first writes, and then reads back the value of the gain
;* register on Physical Channel 1
;*****************************************************************************
;*** Write to Gain Register of Physical Channel 1 ***
rwgain LDA #$02 ;Command to Write Gain Register of PC 1
STA COMMAND ;Prepeare COMMAND byte
LDA #$80 ;Value for High Byte
STA HIGHBYTE ;Prepare HIGHBYTE
CLR MIDBYTE ;Prepare MIDBYTE
CLR LOWBYTE ;Prepare LOWBYTE
JSR write_register;Write to Gain Register
;*** Read From Gain Register of Physical Channel 1 ***
LDA #$0A ;Command to Read Gain Register of PC 1
STA COMMAND ;Prepare COMMAND byte
JSR read_register;Read from Gain Register
RTS ;Return