Cirrus Logic AN131 - Manual (Page 7)

AN131
AN131REV2 7
MAIN EQU * ;Start from reset vector
;*** Initialize and Calibrate the system ***
JSR initialize ;Initialize the System
JSR write_csrs ;Modify the Channel Setup Registers
JSR calibrate ;Calibrate ADC Offset
JSR rwgain ;Write and read gain register
;*** Continuously perform single conversions ***
mloop:
JSR convert ;Obtain a conversion from the ADC
JMP mloop ;Keep Looping
;*** End MAIN ***
;*****************************************************************************
;* Subroutines
;*****************************************************************************
;*****************************************************************************
;* Routine - initialize
;* Input - none
;* Output - none
;* This subroutine initializes Port D as a SPI port to interface to the
;* CS5521/22/23/24/28 ADC.
;* A time delay for the ADC oscillator start-up period is provided, as well
;* as a delay for the ADC’s power-on reset.
;* Typically, a 32.768 KHz crystal has a start-up time of about 500ms. After
;* this delay, an additional 1003 XIN cycles are delayed for the ADC reset.
;* The ADC’s serial port is also reset at this time
;*****************************************************************************
initialize LDA #%01010000 ;Load ACCA with values for SPCR
STA SPCR ;Setup SPI Port
LDA #$40 ;Load ACCA with delay count value
JSR delay ;Delay 1003 XIN for power-on reset
LDA #220 ;Load ACCA with delay count value
JSR delay ;Delay for oscillator start-up 170ms
JSR delay ;Delay for oscillator start-up 170ms
JSR delay ;Delay for oscillator start-up 170ms
;*** Initialize ADC serial port ***
LDX #$0F ;Value of 15 for first 15 Bytes
LDA #$FF ;Load ACCA with all 1’s
sloop: JSR send_spi ;Send info to ADC
DECX ;Decrement Counter