Cirrus Logic AN131 - Manual (Page 8)

AN131
8 AN131REV2
BNE sloop ;Repeat loop if counter isn’t zero
LDA #%11111110 ;Load ACCA with last byte
JSR send_spi ;Send final byte to ADC
RTS ;Exit routine
;*****************************************************************************
;* Routine - write_csrs
;* Input - none
;* Output - none
;* This subroutine is used to write to the Channel Setup Registers. It first
;* changes the depth pointer bits in the configuration register to reflect
;* the number of CSRs to be written, and then writes information to the
;* appropriate number of CSRs.
;*****************************************************************************
write_csrs LDA #$0B ;Command to read config. register
STA COMMAND ;Prepare command byte
JSR read_register;Read the configuration register
;*** Mask DP3-DP0 to access two CSRS (four Setups) ***
LDA MIDBYTE ;Get Middle Byte in ACCA
AND #$3F ;Mask DP3-DP2 low
ORA #$30 ;Mask DP1-DP0 high
STA MIDBYTE ;Put info back into Middle Byte location
LDA #$03 ;Command to write back to config Register
STA COMMAND ;Prepare Command Byte
JSR write_register;Write Configuration Register
;*** Write to CSRs - note, the ADC expects information for the number of
;
CSRs indicated in the Depth Bits (DP3-DP0 in the configuration
; register) so all of the CSRs must be written at this time.
LDA #$05 ;Command to write CSRs
JSR send_spi ;send command to ADC
;*** Setup CSR #1 - Setups 1 and 2
;
Sets both Setups to a default value of ’000’
; (A1-A0 = 00, Physical Channel = 1, OWR = 15Hz,
; Input V-range = 100mV, Bipolar Measurement Mode)
LDA #$00 ;Load ACCA with zeros
JSR send_spi ;One byte of zero...
JSR send_spi ;Two bytes of zero...
JSR send_spi ;Three bytes of zero.
;*** Setup CSR #2 - Setups 3 and 4
;
Sets Setup 3 to ’4C0’ and Setup 4 to ’105’
; Setup 3 Settings - (A1-A0 = 01, Physical Channel = 2, OWR = 101.1Hz,
; input V-range = 100mV, Bipolar)