Cirrus Logic AN130 - Manual (Page 7)

AN130
AN130REV2 7
;* Routine - main
;* Input - none
;* Output - none
;* This is the entry point to the program, as well as the central loop.
;*****************************************************************************
org 0x05 ; program memory beginning location
main
;*** Initialize and Calibrate System ***
CALL initialize ; Initialize the System
CALL write_csrs ; Modify the Channel Setup Registers
CALL calibrate ; Calibrate ADC Offset
CALL modify_gain ; Write and Read gain register
;*** Loop to perform continuous single conversions ***
mloop:
CALL convert ; Obtain conversions from ADC
goto mloop ; Keep looping
;*** End main ***
;*****************************************************************************
;* Subroutines
;*****************************************************************************
;*****************************************************************************
;* Routine - initialize
;* Input - none
;* Output - none
;* This subroutine initializes Port A to interface to the CS5521/22/23/24/28 ADC.
;* A time delay is provided to allow for the ADC oscillator to power up.
;* Typically, a 32.768 KHz crystal has a start-up time of about 500ms.
;* Additionally, 1003 XIN cycles are delayed for the ADC’s power-on reset
;* after the crystal has stabilized. The total delay is 660ms upon system
;* power-up, assuming that the microcontroller has no start-up delay.
;*****************************************************************************
initialize CLRF PORTA ; Clear Port A Output data latches
BSF STATUS, RP0 ; Select Register Bank 1 - control
MOVLW 0x04 ; Directional Values for Port A:
MOVWF TRISA ; RA2 = input, RA0-1 & 3-4 = output
BCF STATUS, RP0 ; Select Register Bank 0 - normal
MOVLW 0x32 ; Load W for delay count
CALL delay ; Delay 1003 XIN cycles