Cirrus Logic AN130 - Manual (Page 14)

AN130
14 AN130REV2
;* Routine - delay
;* Input - Count in W register
;* Output - none
;* This subroutine delays by using a count value stored in register W. This
;* example was tested using a 10MHz clock (E = 2.5 MHz), thus each
;* cycle is 400ns. This delay is approximately equivalent to:
;* (400ns)*(1536)*(count value in W) - A count of 720 provides a 445ms delay
;*****************************************************************************
delay MOVWF COUNT ; Move delay value to COUNT
outlp: CLRF TEMP ; TEMP used for inner loop counter
innlp: NOP ; 1 cycle - 400ns
NOP ; 2 cycles - 800ns
NOP ; 3 cycles - 1.2 us
NOP ; 4 cycles - 1.6 us
DECFSZ TEMP, 1 ; Decrement TEMP and loop 256 times
goto innlp
DECFSZ COUNT, 1 ; Decrement COUNT and loop
goto outlp
RETURN ; Exit delay
;*****************************************************************************
;* Interrupt Vectors
;*****************************************************************************
NOT_USEDRETFIE
ORG 0x04 ; originate interrupt vector here
goto NOT_USED ; no interrupts enabled
end ; end program listing