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Figure 15. 3rd overtone crystal configuration, Figure 16. cs44600 internal clock generation – Cirrus Logic CS44600 User Manual

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DS633F1

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CS44600

Appropriate clock dividers for each functional block and a programmable divider to support an output for
switched-mode power supply synchronization are provided. The clock generation for the CS44600 is
shown in the

Figure 16

.

Y1

L1

C3

C1

C2

XTI

XTO

Figure 15. 3

rd

Overtone Crystal Configuration

PWM_MCLK

SRC_MCLK

XTO

XTI

MOD_MCLK

SYS_CLK

PS_SYNC

PWM Master
Clock Divider

System Clock

Divider

Power Supply

Sync. Divider

PWM Modulator

Clock Divider

Sample Rate Converter

Clock Divider

Figure 16. CS44600 Internal Clock Generation