Cirrus Logic CS44600 - Manual (Page 14)

14 DS633F1
CS44600
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT
(VD = 2.5 V, VDX = VDP = VLS = 3.3 V; VLC = 2.5 V to 5.0 V; Inputs: Logic 0 = GND, Logic 1 = VLC, C
L
= 30 pF)
18. Data must be held for sufficient time to bridge the transition time, t
f
, of SCL.
Parameter Symbol Min Max Unit
SCL Clock Frequency f
scl
- 100 kHz
Bus Free Time between Transmissions t
buf
4.7 - µs
Start Condition Hold Time (prior to first clock pulse) t
hdst
4.0 - µs
Clock Low time t
low
4.7 - µs
Clock High Time t
high
4.0 - µs
Setup Time for Repeated Start Condition t
sust
4.7 - µs
SDA Hold Time from SCL Falling (Note 18) t
hdd
10 - ns
SDA Setup time to SCL Rising t
sud
250 - ns
Rise Time of SCL and SDA t
r
- 1000 ns
Fall Time SCL and SDA t
f
- 300 ns
Setup Time for Stop Condition t
susp
4.7 - µs
t
buf t
hdst
t
hdst
t
low
t r
t f
t
hdd
t
high
t sud t sust
t susp
Stop Start Start Stop
Repeated
SDA
SCL
Figure 8. Control Port Timing - I²C Format