Cirrus Logic CS4382A - Manual (Page 23)

DS618F2 23
CS4382A
4.3 Digital Interface Formats
The serial port operates as a slave and supports the I²S, Left-justified, and Right-justified digital interface
formats with varying bit depths from 16 to 24 as shown in
Figures 7 - 12 . Data is clocked into the DAC on the
rising edge.
LRCK
SCLK
Left Channel Right Channel
SDINx +3 +2 +1 +5 +4 -1 -2 -3 -4 -5 +3 +2 +1 +5 +4 -1 -2 -3 -4 MSB LSB MSB LSB
Figure 7. Format 0 - Left-Justified up to 24-bit Data
LRCK
SCLK
Left Channel Right Channel
SDINx +3 +2 +1 +5 +4 -1 -2 -3 -4 -5 +3 +2 +1 +5 +4 -1 -2 -3 -4 MSB MSB LSB LSB
Figure 8. Format 1 - I²S up to 24-bit Data
LRCK
SCLK
Left Channel
Right Channel
SDINx 6 5 4 3 2 1 0 9 8 7 15 14 13 12 11 10 6 5 4 3 2 1 0 9 8 7 15 14 13 12 11 10
32 clocks
Figure 9. Format 2 - Right-Justified 16-bit Data
LRCK
SCLK
Left Channel
SDINx 6 5 4 3 2 1 0 7 23 22 21 20 19 18 6 5 4 3 2 1 0 7 23 22 21 20 19 18
32 clocks
0
Right Channel
Figure 10. Format 3 - Right-Justified 24-bit Data