Cirrus Logic CS4382A - Manual (Page 2)

2 DS618F2
CS4382A
TABLE OF CONTENTS
1. PIN DESCRIPTION ................................................................................................................................. 6
2. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 8
RECOMMENDED OPERATING CONDITIONS .................................................................................... 8
ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 8
DAC ANALOG CHARACTERISTICS - COMMERCIAL (-CQZ) ............................................................. 9
DAC ANALOG CHARACTERISTICS - AUTOMOTIVE (-DQZ) ........................................................... 10
POWER AND THERMAL CHARACTERISTICS .................................................................................. 11
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ...................................... 12
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ...................................... 13
DSD COMBINED DIGITAL & ON-CHIP ANALOG FILTER RESPONSE ............................................ 13
DIGITAL CHARACTERISTICS ............................................................................................................ 14
SWITCHING CHARACTERISTICS - PCM .......................................................................................... 15
SWITCHING CHARACTERISTICS - DSD ........................................................................................... 16
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT ............................................. 17
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT ............................................ 18
3. TYPICAL CONNECTION DIAGRAM .................................................................................................. 19
4. APPLICATIONS ................................................................................................................................... 21
4.1 Master Clock .................................................................................................................................. 21
4.2 Mode Select ................................................................................................................................... 21
4.3 Digital Interface Formats ................................................................................................................ 23
4.4 Oversampling Modes ..................................................................................................................... 24
4.5 Interpolation Filter .......................................................................................................................... 24
4.6 De-emphasis .................................................................................................................................. 24
4.7 ATAPI Specification ....................................................................................................................... 25
4.8 Direct Stream Digital (DSD) Mode ................................................................................................. 26
4.9 Grounding and Power Supply Arrangements ................................................................................ 26
4.9.1 Capacitor Placement ............................................................................................................. 26
4.10 Analog Output and Filtering ......................................................................................................... 26
4.11 Mute Control ................................................................................................................................ 27
4.12 Recommended Power-Up Sequence .......................................................................................... 28
4.12.1 Hardware Mode ................................................................................................................... 28
4.12.2 Software Mode .................................................................................................................... 28
4.13 Recommended Procedure for Switching Operational Modes ...................................................... 29
4.14 Control Port Interface ................................................................................................................... 29
4.14.1 MAP Auto Increment ........................................................................................................... 29
4.14.2 I²C Mode .............................................................................................................................. 29
4.14.2.1 I²C Write ................................................................................................................... 29
4.14.2.2 I²C Read .................................................................................................................. 30
4.14.3 SPI Mode ............................................................................................................................. 30
4.14.3.1 SPI Write .................................................................................................................. 30
4.15 Memory Address Pointer (MAP) ................................................................................................. 31
4.16 INCR (Auto Map Increment Enable) ............................................................................................ 31
4.16.1 MAP4-0 (Memory Address Pointer) .................................................................................... 31
5. REGISTER QUICK REFERENCE ........................................................................................................ 32
6. REGISTER DESCRIPTION .................................................................................................................. 33
6.1 Mode Control 1 (Address 01h) ....................................................................................................... 33
6.1.1 Control Port Enable (CPEN) .................................................................................................. 33
6.1.2 Freeze Controls (FREEZE) ................................................................................................... 33
6.1.3 Master Clock Divide Enable (MCLKDIV) ............................................................................... 33
6.1.4 DAC Pair Disable (DACx_DIS) .............................................................................................. 33
6.1.5 Power Down (PDN) ............................................................................................................... 34
6.2 Mode Control 2 (Address 02h) ....................................................................................................... 34