Cirrus Logic CS4299-BQ - Manual (Page 34)

CS4299-BQ
34
5.2 Powerdown Controls
The Powerdown Control/Status Register
(Index 26h) controls the power management func-
tions. The PR[6:0] bits in this register control the
internal powerdown states of the CS4299-BQ.
Powerdown control is available for individual sub-
sections of the CS4299-BQ by asserting any PRx
bit or any combination of PRx bits. Most power-
down states can be resumed by clearing the corre-
sponding PRx bit. Table 11 shows the mapping of
the power control bits to the functions they man-
age.
When PR0 is ‘set’, the L/R ADCs and the Input
Mux are shut down and the ADC bit in the Power-
down Control/Status Register (Index 26h) is
‘cleared’ indicating the ADCs are no longer in a
ready state. The same is true for the DACs, the an-
alog mixers, and the reference voltage (Vrefout).
When the PR2 or PR3 bit of the mixer is ‘cleared’,
the mixer section will begin a power-on process,
and the corresponding powerdown status bit will be
‘set’ when the hardware is ready.
Shutting down the AC-link by ‘setting’ PR4 causes
the primary Codec to turn off the BIT_CLK and
drive SDATA_IN low. It also ignores SYNC and
SDATA_OUT in their normal capacities. Either a
Cold Reset or a Warm Reset is required to restore
operation to the CS4299-BQ. A Cold Reset will re-
store all mixer registers to their power-on default
values. A Warm Reset will not alter the values of
any mixer register, except clearing the PR4 bit in
Powerdown Control/Status Register (Index 26h).
The PR5 bit powers down all analog and digital
subsections of the device. A Cold Reset is the only
way to restore operation to the CS4299-BQ after a
PR5 global powerdown.
The CS4299-BQ does not automatically mute any
input or output when the powerdown bits are ‘set’.
The software driver controlling the AC ’97 device
must manage muting the input and output analog
signals before putting the part into any power man-
agement state. The definition of each PRx bit may
affect a single subsection or a combination of sub-
sections within the CS4299-BQ. Table 12 on
page 35 contains the matrix of subsections affected
by the respective PRx function. Table 13 on
page 35 shows the different operating power con-
sumptions levels for different powerdown func-
tions.
PR Bit Function
PR0 L/R ADCs and Input Mux Powerdown
PR1 Front DACs Powerdown
PR2 Analog Mixer Powerdown (Vref on)
PR3 Analog Mixer Powerdown (Vref off)
PR4 AC-link Powerdown (BIT_CLK off)*
PR5 Internal Clock Disable
PR6 Alternate Line Out Powerdown
* Applies only to primary codec
Table 11. Powerdown PR Bit Functions
34 DS319-BQPP2
CS4299-BQ