Cirrus Logic CS4299-BQ - Manual (Page 18)

CS4299-BQ
18
3.3 AC-Link Protocol Violation - Loss of
SYNC
The CS4299-BQ is designed to handle SYNC pro-
tocol violations. The following are situations where
the SYNC protocol has been violated:
• The SYNC signal is not sampled high for exact-
ly 16 BIT_CLK clock cycles at the start of an
audio frame.
• The SYNC signal is not sampled high on the
256th BIT_CLK clock period after the previous
SYNC assertion.
• The SYNC signal goes active high before the
256th BIT_CLK clock period after the previous
SYNC assertion.
Upon loss of synchronization with the controller,
the CS4299-BQ will ‘clear’ the Codec Ready bit in
the serial data input frame until two valid frames
are detected. During this detection period, the
CS4299-BQ will ignore all register reads and
writes and will discontinue the transmission of
PCM capture data. In addition, if the LOSM bit in
the Misc. Crystal Control Register (Index 60h) is
‘set’ (default), the CS4299-BQ will mute all analog
outputs. If the LOSM bit is ‘clear’, the analog out-
puts will not be muted.
18 DS319-BQPP2
CS4299-BQ