Cirrus Logic CS4265 - Manual

Copyright
 Cirrus Logic, Inc. 2012
(All Rights Reserved)
http://www.cirrus.com
104 dB, 24-Bit, 192 kHz Stereo Audio CODEC
D/A Features
 Multi-Bit Delta Sigma Modulator
 104 dB Dynamic Range
 -90 dB THD+N
 Up to 192 kHz Sampling Rates
 Single-Ended Analog Architecture
 Volume Control with Soft Ramp
– 0.5 dB Step Size
– Zero Crossing, Click-Free Transitions
 Popguard
®
Technology
– Minimizes the Effects of Output Transients
 Filtered Line-Level Outputs
 Selectable Serial Audio Interface Formats
– Left-Justified up to 24-bit
– I²S up to 24-bit
– Right-Justified 16-, 18-, 20-, and 24-bit
 Selectable 50/15 µs De-Emphasis
A/D Features
 Multi-Bit Delta Sigma Modulator
 104 dB Dynamic Range
 -95 dB THD+N
 Stereo 2:1 Input Multiplexer

Programmable Gain Amplifier (PGA)
– ± 12 dB Gain, 0.5 dB Step Size
– Zero Crossing, Click-Free Transitions
 Pseudo-Differential Stereo Line Inputs
 Stereo Microphone Inputs
– +32 dB Gain Stage
– Low-Noise Bias Supply

Up to 192 kHz Sampling Rates
 Selectable Serial Audio Interface Formats
– Left-Justified up to 24-bit
– I²S up to 24-bit
 High-Pass Filter or DC Offset Calibration
1.8 V to 5 V
Multibit
 Modulator
Multibit
 Modulator
Low-Latency
Anti-Alias Filter
Interpolation
Filter
Interpolation
Filter
Left DAC Output
Right DAC Output
Switched Capacitor
DAC and Filter
Multibit
Oversampling
ADC
Multibit
Oversampling
ADC
Low-Latency
Anti-Alias Filter
High Pass
Filter
High Pass
Filter
Stereo
Line Input
Serial
Audio
Input
Serial
Audio
Output
3.3 V to 5 V 3.3 V to 5 V
Switched Capacitor
DAC and Filter
MUX
PGA
Volume
Control
Volume
Control
PC
M
Ser
ial
Int
er
fa
ce
/ L
oop
bac
k
Mute
Control
Le
vel
Tra
nslat
or
Le
vel
Tr
an
sl
at
or
Reset
I 2 C Control
Data
Mute Control
Mic Input
1 & 2
PGA +32 dB
+32 dB
Internal Voltage
Reference
IEC60958-3 Transmitter
Mic Bias Microphone Bias
Transmitter Output
R
egist
er
Conf
igur
at
io
n
AUG '12
DS657F3
CS4265