Cirrus Logic CDB4245 - Manual (Page 6)

CDB4245
6 DS656DB1
1.12 USB Control Port
The USB control port connector (J37) is currently unavailable.
2. SYSTEM CLOCKING
The CDB4245 implements two discrete clocking domains. One discrete domain services Serial Audio Port 1 of the
CS4245, and the other discrete domain services Serial Audio Port 2 of the CS4245. The two clock domains may
operate independently, or may be tied together. Configuration of the clocking domains is achieved using the controls
within the Board Controls group box on the CDB4245 Controls tab in the GUI software application.
2.1 Clock Domain 1
Clock domain 1 is comprised of Serial Audio Port 1 of the CS4245, the CS8406, Oscillator 1 (canned oscil-
lator Y1), and the PCM1 I/O header (J10).
The master clock signal (MCLK1) may be sourced from Oscillator 1 (Y1), the PCM1 I/O header (J10), or
may be copied from the MCLK2 signal.
The sub-clock signals (SCLK1 and LRCK1) may be sourced from the CS4245 in master mode, the CS8406
in master mode, the PCM1 I/O header, or may be copied from the sub-clock 2 signals (SCLK2 and LRCK2).
Configuration of clock domain 1 is achieved using the MCLK 1 Source and Subclock 1 Source controls with-
in the Board Controls group box on the CDB4245 Controls tab in the GUI software application.
2.2 Clock Domain 2
Clock domain 2 is comprised of Serial Audio Port 2 of the CS4245, the CS8416, Oscillator 2 (canned oscil-
lator Y2), and the PCM2 I/O header (J9).
The master clock signal (MCLK2) may be sourced from Oscillator 2 (Y2), the CS8416 recovered clock, the
PCM2 I/O header (J9), or may be copied from the MCLK1 signal.
The sub-clock signals (SCLK2 and LRCK2) may be sourced from the CS4245 in master mode, the CS8416
in master mode, the PCM2 I/O header, or may be copied from the sub-clock 1 signals (SCLK1 and LRCK1).
Configuration of clock domain 2 is achieved using the MCLK 2 Source and Subclock 2 Source controls with-
in the Board Controls group box on the CDB4245 Controls tab in the GUI software application.
3. SYSTEM DATA ROUTING
The CDB4245 implements comprehensive data routing capabilities. The SDIN source of both the CS4245 and the
CS8406 may be easily selected using the provided GUI software application.
3.1 CS4245 SDIN Source
The CS8416 S/PDIF receiver, the PCM2 I/O header (J9), or the CS4245 serial data output (SDOUT) may
source the serial data input of the CS4245. Configuration of the CS4245 SDIN source is achieved using the
CS4245 SDIN Source control within the Board Controls group box on the CDB4245 Controls tab in the GUI
software application.
3.2 CS8406 SDIN Source
The CS8416 S/PDIF receiver, the PCM2 I/O header (J9), or the CS4245 serial data output (SDOUT) may
source the serial data input of the CS8406 S/PDIF transmitter. Configuration of the CS8406 SDIN source is
achieved using the CS8406 SDIN Source control within the Board Controls group box on the CDB4245 Con-
trols tab in the GUI software application.