Cirrus Logic CDB4245 - Manual

Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
Cirrus Logic, Inc.
www.cirrus.com
CDB4245
Evaluation Board for CS4245
Features
z Single-ended Analog Inputs
z Single-ended Analog Outputs
z CS8406 S/PDIF Digital Audio Transmitter
z CS8416 S/PDIF Digital Audio Receiver
z Independent ADC and DAC Clock Domains
z Header for Optional External Software
Configuration of CS4245
z Header for External PCM Serial Audio I/O
z 3.3 V Logic Interface
z Pre-defined Software Scripts
z Demonstrates Recommended Layout and
Grounding Arrangements
z Windows ® Compatible Software Interface
to Configure CS4245 and Inter-board
Connections
ORDERING INFORMATION
CDB4245 Evaluation Board
Description
The CDB4245 evaluation board is an excellent means
for evaluating the CS4245 CODEC. Evaluation requires
an analog/digital signal source and analyzer, and power
supplies. A Windows
®
PC compatible computer must be
used to evaluate the CS4245.
System timing for the I²S, Left-Justified and Right-Justi-
fied interface formats can be provided by the CS4245,
the CS8416, the CS8406, or by a PCM I/O stake header
with an external source connected.
RCA phono jacks are provided for the CS4245 analog in-
puts and outputs. Digital data I/O is available via RCA
phono or optical connectors to the CS8416 and CS8406.
The Windows
®
software provides a GUI to make config-
uration of the CDB4245 easy. The software
communicates through the PC’s serial port to configure
the control port registers so that all features of the
CS4245 can be evaluated. The evaluation board may
also be configured to accept external timing and data
signals for operation in a user application during system
development.
I
CS4245
FPGA
CS8416 CS8406
Passive Input Filter
Header
Active Input Filter
Header
Microphone Input
Passive Output Filter
Active Output Filter
Canned
Oscillator
Canned
Oscillator
Control Port Interface
Test Points
CS8416 CS8406
M
U
X
Master Clock Master Clock
Sub-clocks and Data
FEB ‘05
DS656DB1