Cirrus Logic CRD5376 - Manual (Page 20)

CRD5376
20 DS612RD2
Data is collected through the SD port.
Modulator ∆Σ data is input through the modulator interface.
Test DAC ∆Σ data is generated by the test bit stream generator.
Amplifier, modulator, test DAC and analog switch digital pins are controlled by the GPIO port.
SD Port Signals Description
SDTKI Token input to initiate an SD port transaction
SDRDYz Data ready acknowledge, active low
SDCLK Serial clock input
SDDAT Serial data output
SDTKO Token output (unused on CRD5376)
Modulator Signals Description
MCLK Modulator clock output
MCLK/2 Modulator clock output, half-speed
MSYNC Modulator synchronization output
MDATA[1..4] Modulator delta-sigma data inputs
MFLAG[1..4] Modulator over-range flag inputs
Test Bit Stream Signals Description
TBSDATA
Test DAC delta-sigma data output
TBSCLK Test DAC clock output (unused on CRD5376)
GPIO Signals Description
GPIO[0..1]:MUX[0..1] Amplifier input mux selection
GPIO[2..4]:GAIN[0..2] Amplifier gain / test DAC attenuation
GPIO[5..7]:MODE[0..2] Test DAC mode selection
GPIO[8]:PWDN Amplifier / modulator power down
GPIO[9..11]:SW[0..2] Analog switch control