Cirrus Logic CRD5376 - Manual (Page 17)

CRD5376
DS612RD2 17
2.2.2.2 Rough-Fine Outputs - OUTR, OUTF
The analog outputs of the CS3301A/02A differential amplifiers are split into rough charge and fine charge
signals for input to the CS5372A
∆Σ modulators.
Analog signal traces out of the CS3301A/02A amplifiers and into the CS5372A modulators are 4-wire
INR+, INF+, INF-, INR- quad groups, and are routed with INF+ and INF- as a traditional differential pair
and INR+ and INR- as guard traces outside the respective INF+ and INF- traces.
2.2.2.3 Anti-alias RC Filters
The CS5372A ∆Σ modulators are 4th order and high frequency input signals can cause instability. Simple
single-pole anti-alias RC filters are required between the CS3301A/02A amplifier outputs and the
CS5372A modulator inputs to bandwidth limit analog signals into the modulator.
For the CRD5376, the CS3301A/02A amplifier outputs are connected to external 680 Ω series resistors,
and a differential anti-alias RC filter is created by connecting 20 nF of high linearity differential capacitance
(2x 10 nF C0G) between each half of the rough and fine signals.
2.2.3 Delta-Sigma Modulators
Each CS5372A dual modulator performs the A/D function for differential analog signals from two
CS3301A/02A amplifiers. The digital outputs are oversampled
∆Σ bit streams.
2.2.3.1 Rough-Fine Inputs - INR, INF
The modulator analog inputs are separated into rough and fine signals, each of which has an anti-alias
RC filter to limit the signal bandwidth into the modulator inputs.
2.2.3.2 Offset Enable - OFST
The CS5372A ∆Σ modulator requires differential offset to be enabled to eliminate idle tones for a termi-
nated input. The use of internal offset to eliminate idle tones is described in the CS5372A data sheet. By
default, OFST is enabled for the CS5372A modulators on CRD5376.
Analog Signals Description
INR1, INF1 Channel 1 analog rough / fine inputs
INR2, INF2 Channel 2 analog rough / fine inputs
VREF Voltage reference analog inputs
Digital Signals
Description
MDATA[1..2] Modulator delta-sigma data outputs
MFLAG[1..2] Modulator over-range flag outputs
MCLK Modulator clock input
MSYNC Modulator synchronization input
PWDN[1..2] Power down mode enable
OFST Internal offset enable (+VD when using CS3301A/02A)