Cirrus Logic CRD5378 - Manual (Page 23)

CRD5378
DS639RD2 23
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Pin # Pin Name Assignment Description
1 P0.1 SYNC SYNC signal output
2 P0.0 SYNC_IO SYNC signal input from RS-485
3 GND Ground
4 D+ USB differential data transceiver
5 D- USB differential data transceiver
6 VDD +3.3 V power supply input
7 REGIN +5 V power supply input
8 VBUS USB voltage sense input
Pin # Pin Name Assignment Description
9 /RST
C2CK
RESETz Power on reset output, active low
Clock input for debug interface
10 P3.0
C2D
GPIO General purpose I/O
Data in/out for debug interface
11 P2.7 AIN- ADC input
12 P2.6 AIN+ ADC input
13 P2.5 GPIO General Purpose I/O (unused in CRD5378)
14 P2.4 MODE2 CS5373A mode control
15 P2.3 MODE1 CS5373A mode control
16 P2.2 MODE0 CS5373A mode control
Pin # Pin Name Assignment Description
17 P2.1 GPIO General Purpose I/O (unused in CRD5378)
18 P2.0 GPIO General Purpose I/O (CS5378 RESETz)
19 P1.7 BYP_EN I2C bypass switch control
20 P1.6 SDA_DE I2C data driver enable
21 P1.5 SCL I2C clock in/out
22 P1.4 SDA I2C data in/out
23 P1.3 SS SPI chip select output, active low
24 P1.2 MOSI SPI master out / slave in
Pin # Pin Name Assignment Assignment
25 P1.1 MISO SPI master in / slave out
26 P1.0 SCK SPI serial clock
27 P0.7 Internal VREF bypass capacitors
28 P0.6 DRDYz Data ready input, active low
29 P0.5 RX UART receiver
30 P0.4 TX UART transmitter
31 P0.3 4.096MHZ External clock input
32 P0.2 TIMEB Time Break output