ARM VERSION 1.2 User Manual
Page 197

Thumb Instruction Reference
ARM DUI 0068B
Copyright © 2000, 2001 ARM Limited. All rights reserved.
5-3
ROR
Rotate right
4T
SBC
Subtract with carry
4T
STMIA
Store multiple registers, increment after
4T
STR
Store register, immediate offset
4T
STR
Store register, register offset
4T
STR
Store register, pc or sp relative
4T
SUB
Subtract
4T
SWI
Software interrupt
4T
TST
Test bits
4T
a. nT : available in T variants of ARM architecture version n and above
Table 5-1 Location of Thumb instructions and pseudo-instructions (continued)
Instruction mnemonic
Brief description
Page
Architecture
a