ARM VERSION 1.2 - Manual (Page 112)

ARM Instruction Reference
4-2 Copyright © 2000, 2001 ARM Limited. All rights reserved. ARM DUI 0068B
Table 4-1 Location of ARM instructions
Mnemonic Brief description Page Architecture a
ADC , ADD Add with carry, Add page 4-27 All
AND Logical AND page 4-30 All
B Branch page 4-58 All
BIC Bit clear page 4-30 All
BKPT Breakpoint page 4-76 5
BL Branch with link page 4-58 All
BLX Branch, link and exchange page 4-60 5T b
BX Branch and exchange page 4-59 4T b
CDP , CDP2 Coprocessor data operation page 4-63 2, 5
CLZ Count leading zeroes page 4-38 5
CMN , CMP Compare negative, Compare page 4-34 All
EOR Exclusive OR page 4-30 All
LDC , LDC2 Load coprocessor page 4-67 2, 5
LDM Load multiple registers page 4-18 All
LDR Load register page 4-6 All
MAR Move from registers to 40-bit accumulator page 4-77 XScale c
MCR , MCR2 , MCRR Move from register(s) to coprocessor page 4-64 2, 5, 5E d
MIA , MIAPH , MIAxy Multiply with internal 40-bit accumulate page 4-53 XScale
MLA Multiply accumulate page 4-40 2
MOV Move page 4-32 All
MRA Move from 40-bit accumulator to registers page 4-77 XScale
MRC , MRC2 Move from coprocessor to register page 4-65 2, 5
MRRC Move from coprocessor to 2 registers page 4-66 5E d
MRS Move from PSR to register page 4-73 3
MSR Move from register to PSR page 4-74 3