PNI RM3100 Evaluation Board - Manual (Page 10)

PNI Sensor Corporation Doc 1017252 r02
RM3100 Evaluation Board User Manual Page 9 of 33
4.3 RM3100 Evaluation Board Pin Assignments
The RM3100 Evaluation Board’s pin assignments are summarized below in Table 4-1. Pin
numbers run counterclockwise, when looking from the top, starting at the Pin 1 designator as
shown in Figure 3-1.
Table 4-1: RM3100 Evaluation Board Pin Assignments
Pin# Pin Name Description
1
SCK /
SCL
SPI interface (SCK) – Serial clock input
I
2
C interface (SCL) – Serial clock line
2
SO /
SA1
SPI interface (SO) – Master Input, Slave Output
I
2
C interface – Bit 1 of slave address
3
SI
SDA
SPI interface (SI) – Master Output, Slave Input Serial Data
I
2
C interface (SDA) – Serial Data Line
4
SSN /
SA0
SPI interface – Active low to select port
I
2
C interface – Bit 0 of slave address
5 DRDY Status line
7 AVSS Ground pin for analog section of ASIC
10 I2CEN I
2
C enable pin (HIGH = I
2
C, LOW = SPI)
12 DVDD Supply voltage for digital section of ASIC.
13 AVDD Supply voltage for analog section of ASIC
14 DVSS Ground pin for digital section of ASIC
6, 8, 9, 11 NC Do not connect
4.3.1 General Purpose Pins
DVDD and AVDD (pins 12 & 13)
AVDD and DVDD should be tied to the analog and digital supply voltages,
respectively. The recommend voltages are defined in Table 3-3, and the maximum
voltages are given in Table 3-2. DVDD must be on whenever AVDD is on, so
DVDD should either be brought up first or at precisely the same time as AVDD.
AVDD can be turned off when not making a measurement to conserve power, since
all other operations are supported with DVDD. Under this condition, register values
will be retained as long as DVDD is powered. Also, AVDD must be within 0.1 V of
DVDD when AVDD is on.