Advantech PCI-1710 - Manual (Page 43)

Chapter 4 Register Structure and Format 39
differential, and AI14 is differential, then the scan sequence is AI11,
AI12, AI14, AI11, AI12, AI14, AI11…
Warning! Only even channels can be set as differential. An
odd channel will become unavailable if its preceding
channel is set as differential.
4.7 Control Register — BASE+6
The write-only register BASE+6 allows users to set an A/D trigger
source and an interrupt source.
Table 4-7: Control register
SW Software trigger enable bit
Set 1 to enable software trigger, and set 0 to disable.
PACER PACER trigger enable bit
Set 1 to enable pacer trigger, and set 0 to disable.
EXT External trigger enable bit
Set 1 to enable external trigger, and set 0 to disable.
Note! Users cannot enable SW, PACER and EXT
concurrently.
Write Control Register
Bit # 7 6 5 4 3 2 1 0
BASE + 6 CNT0 ONE/FH IRQEN GATE EXT PACER SW