Advantech PCI-1710 - Manual (Page 22)

1 8 PCI-1710/1710HG User's Manual
I/O Connector Signal Descriptions (part III)
Signal
Name
Reference Direction Description
PACER
_OUT
DGND Output
Pacer Clock Output - This pin pulses once for
each pacer clock when turned on. If A/D
conversion is in the pacer trigger mode, users
can use this signal as a synchronous signal for
other applications. A low-to-high edge triggers
A/D conversion to start.
TRG _GATE DGND Input
A/D External Trigger Gate - This pin is
external trigger signal input gate control. When
TRG _GATE is connected to +5 V, it will enable
the external trigger signal to input. When TRG
_GATE is connected to DGND, it will disable
the external trigger signal to input.
EXT _TRG DGND Input
A/D External Trigger - This pin is external
trigger signal input for the A/D conversion. A
low-to-high edge triggers A/D conversion to
start.
+12V DGND Output
+12 V
DC
Source - This pin is +12V power
supply.
+5V DGND Output
+5 V
DC
Source - This pin is +5 V power
supply.