Rainbow Electronics MAX1545 User Manual
Page 36
MAX1519/MAX1545
Dual-Phase, Quick-PWM Controllers for
Programmable CPU Core Power Supplies
36
______________________________________________________________________________________
Current-Balance Compensation (CCI)
The current-balance compensation capacitor (C
CCI
)
integrates the difference between the main and sec-
ondary current-sense voltages. The internal compensa-
tion resistor (R
CCI
= 20k
Ω) improves transient response
by increasing the phase margin. This allows the
dynamics of the current-balance loop to be optimized.
Excessively large capacitor values increase the inte-
gration time constant, resulting in larger current differ-
ences between the phases during transients.
Excessively small capacitor values allow the current
loop to respond cycle-by-cycle but can result in small
DC current variations between the phases. Likewise,
excessively large resistor values can also cause DC
current variations between the phases. Small resistor
values reduce the phase margin, resulting in marginal
stability in the current-balance loop. For most applica-
tions, a 470pF capacitor from CCI to the switching reg-
ulator’s output works well.
Connecting the compensation network to the output
(V
OUT
) allows the controller to feed forward the output
voltage signal, especially during transients. To reduce
noise pickup in applications that have a widely distrib-
uted layout, it is sometimes helpful to connect the com-
pensation network to the quiet analog ground rather
than V
OUT
.
Setting Voltage Positioning
Voltage positioning dynamically lowers the output volt-
age in response to the load current, reducing the
processor’s power dissipation. When the output is
loaded, an op amp (Figure 5) increases the signal fed
back to the Quick-PWM controller’s feedback input.
The adjustable amplification allows the use of standard,
current-sense resistor values, and significantly reduces
the power dissipated since smaller current-sense resis-
tors can be used. The load-transient response of this
control loop is extremely fast, yet well controlled, so the
amount of voltage change can be accurately confined
within the limits stipulated in the microprocessor power-
supply guidelines.
The voltage-positioned circuit determines the load current
from the voltage across the current-sense resistors
(R
SENSE
= R
CM
= R
CS
) connected between the inductors
and output capacitors, as shown in Figure 10. The volt-
age drop can be determined by the following equation:
where
η
SUM
is the number of phases summed together
for voltage-positioning feedback, and
η
TOTAL
is the total
number of active phases. When the slave controller is
disabled, the current-sense summation maintains the
proper voltage-positioned slope. Select the positive input
summing resistors so R
FBS
= R
F
and R
A
= R
B
.
Minimum Input Voltage Requirements
and Dropout Performance
The nonadjustable minimum off-time one-shot and the
number of phases restrict the output voltage adjustable
range for continuous-conduction operation. For best
dropout performance, use the slower (200kHz) on-time
settings. When working with low input voltages, the
duty-factor limit must be calculated using worst-case
values for on- and off-times. Manufacturing tolerances
and internal propagation delays introduce an error to
the TON K-factor. This error is greater at higher fre-
quencies (Table 6). Also, keep in mind that transient
response performance of buck regulators operated too
close to dropout is poor, and bulk output capacitance
must often be added (see the V
SAG
equation in the
Design Procedure section).
The absolute point of dropout is when the inductor cur-
rent ramps down during the minimum off-time (
∆I
DOWN
)
as much as it ramps up during the on-time (
∆I
UP
). The
ratio h =
∆I
UP
/
∆I
DOWN
is an indicator of the ability to
slew the inductor current higher in response to
increased load, and must always be greater than 1. As
h approaches 1, the absolute minimum dropout point,
the inductor current cannot increase as much during
each switching cycle and V
SAG
greatly increases
unless additional output capacitance is used.
A reasonable minimum value for h is 1.5, but adjusting
this up or down allows trade-offs between V
SAG
, output
capacitance, and minimum operating voltage. For a
given value of h, the minimum operating voltage can be
calculated as:
where
η
OUTPH
is the total number of out-of-phase
switching regulators, V
VPS
is the voltage-positioning
droop, V
DROP1
and V
DROP2
are the parasitic voltage
drops in the discharge and charge paths (see the On-
Time One-Shot section), t
OFF(MIN)
is from the Electrical
Characteristics, and K is taken from Table 6. The
absolute minimum input voltage is calculated with h = 1.
V
V
V
V
h x t
K
V
V
V
IN MIN
OUTPH
FB
VPS
DROP
OUTPH
OFF MIN
DROP
DROP
VPS
(
)
(
)
=
−
+
−
+
−
+
η
η
1
2
1
1
V
A
I
R
A
R
R
VPS
VPS LOAD SENSE
VPS
SUM
F
TOTAL
B
=
=
η
η