Table 30. register map summary (continued) – Rainbow Electronics MAX5945 User Manual
Page 36
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MAX5945
Quad Network Power Controller
for Power-Over-LAN
36
______________________________________________________________________________________
Table 30. Register Map Summary (continued)
ADDR
REGISTER
NAME
R/W
PORT
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
RESET
STATE
CONFIGURATION
12h
Operating
Mode
R/W
4321
P4_M1
P4_M0
P3_M1
P3_M0
P2_M1
P2_M0
P1_M1
P1_M0
A
A
A
A
,A
A
A
A
13h
Disconnect
Enable
R/W
4321
ACD_EN4
ACD_EN3
ACD_EN2
ACD_EN1
DCD_EN4
DCD_EN3
DCD_EN2
DCD_EN1
0000,AAAA
14h
Det/Class
Enable
R/W
4321
CLASS_EN4
CLASS_EN
3
CLASS_EN
2
CLASS_EN
1
DET_EN4
DET_EN3
DET_EN2
DET_EN1
A
A
A
A
,A
A
A
A
15h
Backoff
Enable
R/W
4321
reserved
reserved
reserved
reserved
Bckoff4
Bckoff3
Bckoff2
Bckoff1
0
0
0
0
,M
M
M
M
16h
Timing
Config
R/W
G
RSTR[1]
RSTR[0]
T
S
T
A
R
T
[1
]
T
S
T
A
R
T
[0
] T
F
A
U
L
T
[1
] T
F
A
U
L
T
[0
]
TDISC[1]
TDISC[0]
0000,0000
17h
Misc Config
R/W
G
INT_EN
RSTR_EN
reserved
reserved
POFF_CL
CL_DISC
reserved
reserved
1100,0000
PUSHBUTTONS
18h
Reserved
R/W
G
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
19h
Power Enable
WO
4321
P
W
R
_
O
F
F
4
P
W
R
_
O
F
F
3
P
W
R
_
O
F
F
2
P
W
R
_
O
F
F
1
PWR_ON4
PWR_ON3
PWR_ON2
PWR_ON1
0000,0000
1Ah
Global
WO
G
CLR_INT
reserved
reserved
RESET_IC
RESET_P4
RESET_P3
RESET_P2
RESET_P1
0000,0000
GENERAL
1Bh
ID
RO
G
ID
_C
O
D
E
[ 4]
ID
_C
O
D
E
[ 3]
ID
_C
O
D
E
[ 2]
ID
_C
O
D
E
[ 1]
ID
_C
O
D
E
[ 0
]
REV [2]
REV [1]
REV [0]
1100,0RRR
1Ch
SMODE
CoR
4321
reserved
reserved
reserved
reserved
SMODE4
SMODE3
SMODE2
SMODE1
00000000
1Dh
Reserved
G
reserved
reserved
reserved
reserved
Reserved
reserved
reserved
reserved
00000000
1EH
Watchdog
R/W
G
W
DTIME[7]
WDTIME[6]
WD
TI
ME
[ 5]
WDTIME[4]
WDTIME[3]
WDTIME[2]
WDTIME[1]
WDTIME[0]
00000000
1FH
Switch Mode
R/W
4321
E
N
_
W
H
D
O
G
W
D
_I
N
T
_E
N
reserved
reserved
HWMODE4
HWMODE3
HWMODE2
HWMODE1
00000000
MAXIM RESERVED
20H
Reserved
G
reserved
reserved
reserved
reserved
Reserved
reserved
reserved
reserved
00000000
21H
Reserved
G
reserved
reserved
reserved
reserved
Reserved
reserved
reserved
reserved
00000000
22H
Reserved
G
reserved
reserved
reserved
reserved
Reserved
reserved
reserved
reserved
00000000
23H
Program1
R/W
4321
IGATE[2]
IGATE[1]
IGATE[0]
DET_BYP
OSCF_RS
AC_TH[0]
AC_TH[0]
AC_TH[0]
00000100
24h
Reserved
G
reserved
reserved
reserved
reserved
Reserved
reserved
reserved
reserved
00000000
25h
Reserved
G
reserved
reserved
reserved
reserved
Reserved
reserved
reserved
reserved
00000000
26h
Reserved
G
reserved
reserved
reserved
reserved
Reserved
reserved
reserved
reserved
00000000
27H
Program2
R/W
G
IMAX[3]
IMAX[2]
IMAX[1]
IMAX[0]
TD[3]
TD[2]
TD[1]
TD[0]
01000111
28H
Program3
R/W
G
TF_PR[3]
TF_PR[2]
TF_PR[1]
TF_PR[0]
TS_PR[3]
TS_PR[2]
TS_PR[1]
TS_PR[0]
01110111
*UV and UVLO bits of V
EE
and V
DD
asserted depend on the order V
EE
and V
DD
supplies are brought up.
A = AUTO pin state, A3..0 = ADDRESS pin states, M = MIDSPAN pin state, R = contact factory for current revision code Table 15a.