Rainbow Electronics MAX17031 User Manual
Page 22
MAX17031
Power-MOSFET Selection
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
when using high-voltage (> 20V) AC adapters. Low-
current applications usually require less attention.
The high-side MOSFET (N
H
) must be able to dissipate
the resistive losses plus the switching losses at both
V
IN(MIN)
and V
IN(MAX)
. Ideally, the losses at V
IN(MIN)
should be roughly equal to the losses at V
IN(MAX)
, with
lower losses in between. If the losses at V
IN(MIN)
are
significantly higher, consider increasing the size of N
H
.
Conversely, if the losses at V
IN(MAX)
are significantly
higher, consider reducing the size of N
H
. If V
IN
does
not vary over a wide range, maximum efficiency is
achieved by selecting a high-side MOSFET (N
H
) that
has conduction losses equal to the switching losses.
Choose a low-side MOSFET (N
L
) that has the lowest
possible on-resistance (R
DS(ON)
), comes in a moder-
ate-sized package (i.e., 8-pin SO, DPAK, or D
2
PAK),
and is reasonably priced. Ensure that the MAX17031
DL_ gate driver can supply sufficient current to support
the gate charge and the current injected into the para-
sitic drain-to-gate capacitor caused by the high-side
MOSFET turning on; otherwise, cross-conduction prob-
lems could occur. Switching losses are not an issue for
the low-side MOSFET since it is a zero-voltage switched
device when used in the step-down topology.
Power-MOSFET Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N
H
), the worst-
case power dissipation due to resistance occurs at
minimum input voltage:
Generally, use a small high-side MOSFET to reduce
switching losses at high input voltages. However, the
R
DS(ON)
required to stay within package power-dissi-
pation limits often limits how small the MOSFET can be.
The optimum occurs when the switching losses equal
the conduction (R
DS(ON)
) losses. High-side switching
losses do not become an issue until the input is greater
than approximately 15V.
Calculating the power dissipation in high-side
MOSFETs (N
H
) due to switching losses is difficult, since
it must allow for difficult-to-quantify factors that influ-
ence the turn-on and turn-off times. These factors
include the internal gate resistance, gate charge,
threshold voltage, source inductance, and PCB layout
characteristics. The following switching loss calculation
provides only a very rough estimate and is no substitute
for breadboard evaluation, preferably including verifica-
tion using a thermocouple mounted on N
H
:
where C
OSS
is the high-side MOSFET’s output capaci-
tance, Q
G(SW)
is the charge needed to turn on the high-
side MOSFET, and I
GATE
is the peak gate-drive
source/sink current (1A typ).
Switching losses in the high-side MOSFET can become
a heat problem when maximum AC adapter voltages
are applied due to the squared term in the switching-
loss equation provided above. If the high-side MOSFET
chosen for adequate R
DS(ON)
at low battery voltages
becomes extraordinarily hot when subjected to
V
IN(MAX)
, consider choosing another MOSFET with
lower parasitic capacitance.
For the low-side MOSFET (N
L
), the worst-case power
dissipation always occurs at maximum battery voltage:
The absolute worst case for MOSFET power dissipation
occurs under heavy overload conditions that are
greater than I
LOAD(MAX)
but are not high enough to
exceed the current limit and cause the fault latch to trip.
To protect against this possibility, “overdesign” the cir-
cuit to tolerate:
where I
VALLEY(MAX)
is the maximum valley current
allowed by the current-limit circuit, including threshold
tolerance and sense-resistance variation. The
MOSFETs must have a relatively large heatsink to han-
dle the overload power dissipation.
Choose a Schottky diode (D
L
) with a forward voltage
drop low enough to prevent the low-side MOSFET’s
body diode from turning on during the dead time. As a
general rule, select a diode with a DC current rating
equal to 1/3 the load current. This diode is optional and
can be removed if efficiency is not critical.
I
I
I
LIR
LOAD
VALLEY MAX
LOAD MAX
=
+
⎛
⎝⎜
⎞
⎠⎟
(
)
(
)
2
PD (NL Resistive) = 1
−
⎛
⎝
⎜
⎞
⎠
⎟
⎡
⎣
⎢
V
V
OUT
IN MAX
(
)
⎢⎢
⎤
⎦
⎥
⎥
(
)
I
R
LOAD
DS ON
2
(
)
PD (NH Switching) =
V
I
f
Q
I
IN MAX LOAD SW
G SW
(
)
(
)
G
GATE
I
V
⎛
⎝⎜
⎞
⎠⎟
+
N
N
OSS SW
C
f
2
2
⎛
⎝
⎜
⎞
⎠
⎟
PD (NH Resistive) =
V
V
I
R
OUT
IN
LOAD
D
⎛
⎝⎜
⎞
⎠⎟
(
)
2
S
S ON
(
)
Dual Quick-PWM Step-Down Controller with Low-
Power LDO and RTC Regulator for MAIN Supplies
22
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