Texas Instruments VLYNQ Port - Manual (Page 41)

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A.2.1 Idle (/I/)
A.2.2 End of Packet (/T/)
A.2.3 Byte Disable (/M/)
A.2.4 Flow Control Enable (/P/)
A.2.5 Flow Control Disable (/C/)
A.2.6 Error Indication (/E/)
A.2.7 Init0 (/0/)
A.2.8 Init1 (/1/)
A.2.9 Link (/L/)
A.3 VLYNQ 2.0 Packet Format
bytecnt
10 bits
cmd 2
10 bits
cmd 1
10 bits
address
<4*10 bits
data
N*10 bits
eop
10 bits
pkttype adrmask
VLYNQ 2.0 Packet Format
The idle ordered sets are transmitted continuously and repetitively whenever the serial interface is idle.
Idle is also used in the place of the flowed code in VLYNQ versions 2.0 and later.
An end of packet delimiter delineates the ending boundary of a packet.
The byte disable symbol masks bytes for write operations.
A flow control enable request is transmitted when a VLYNQ module’s receive FIFO is full or nearly full.
This code causes the remote VLYNQ device to cease transmission of data.
The flow control disable request is transmitted by a VLYNQ module when RX FIFO resources are
available to accommodate additional data.
The error indication is transmitted when errors are detected within a packet. Examples of such errors
include illegal packet types and code groups.
The Init0 code group is used during the link initialization sequence. VLYNQ 2.0 and later versions use this
code with an extra byte for identifying version 1.X devices.
The Init1code group is used during the Link initialization sequence. VLYNQ 2.0 and later uses this code
with an extra byte for identifying version 1.X devices.
The link code group is used during the link initialization sequence. A link code group is also transmitted
each time the internal link timer expires.
The VLYNQ 2.0 packet format is shown in Figure A-1 and described in Table A-3 , where 0
Multi-byte fields are transferred least-significant byte first.
Figure A-1. Packet Format (10-bit Symbol Representation)
SPRUE36A – September 2007 VLYNQ Protocol Specifications 41
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