Texas Instruments THUNDERSWITCH II TNETX4090 - Manual (Page 48)

TNETX4090
ThunderSWITCH II

9-PORT 100-/1000-MBIT/S ETHERNET

SWITCH
SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999
48
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
frame routing
VLAN support
The internal routing engine supports the IEEE Std 802.1Q VLANs as shown in Figure 11 and described in the
following paragraphs.
Reset 0x0001
Header
Possibly
Inserted Source
and
Destination
Lookups
IEEE Std
802.1Q
Format
Frame
Header
Non-
IEEE Std
802.1Q
Format
Frame
Receive
Header
Header
Inserted
If rxacc = 1
Header Inserted
Queue
Manager
RAM
Queue
Manager
Header
IEEE Std
802.1Q
Format
Frame
Header
Non-
IEEE Std
802.1Q
Format
Frame
Transmit
Source Port’s
PortxQTag
Inserted
VLAN ID
Header
Stripped
Header
Retained
VLANnQID
VLAN ID
Lookup
Source Address (SA)
Destination Address (DA)
Reset
1st Location:
0x001
All Others:
0x000
No Match
VLAN and
Ethernet
Addresses
VLAN ADDR
Reset to
All 0s
SA
DA VLAN
VLAN
Index
Frame-Routing
Algorithm
UnkUniPorts
UnkMultiPorts
UnkSrcPorts
UnkVLANPort
TxBlockPorts
RxUniBlockPorts
RxMultiBlockPorts
MirrorPort
UplinkPort
TrunkMapx
TrunkxPorts
NLearnPorts
Source Port Number
Port Routing Code
Port Numbers,
Time Stamps
Locked, Secure,
NBLCK, New
Port Information
Reset is
Don’t Care
Record
Number
No
Match Port
Information
All Ports
PortxControl
VLAN
Ports
Nauto
UnkVLAN
Lshare
Disable
VLANnPorts
Reset to
All 1s
IALE
If (equal or
txacc = 1)
Then Strip Header,
Otherwise,
Keep Header
If VLAN ID = 0x000
VLAN ID Replaced
Nage
Mirror
SysControl
Unicast/
Multicast
Compare
VLAN IDs
Destination
Port’s
PortxQTag
Figure 11. VLAN Overview