Texas Instruments TPA3200D1 - Manual (Page 5)

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Audio
Serial
Port
Serial
Control
Port
4x/8x
Oversampling
Digital
Filter
and
Function
Control Multi-Level
Delta-Sigma
Modulator
Audio
Serial
Port
System Clock
BCK
LRCK
DATA
FORMAT
MUTE
DEMP
SCLK
DAC and
2:1 Mux
LR_SEL
VCOM
Gain
Adjust
−
+
+
−
Gain
Adjust FLT1
FLT2
_
+
_
+
_
+
_
+
Deglitch
Logic
Deglitch
Logic
Gate
Drive
Gate
Drive
Clamp
Reference
Short-Circuit
Detect
Start-Up
Protection
Logic
Thermal V
CC
OK
SD
Gain
SHUTDOWN
GAIN0
GAIN1
2
Biases
and
References
Ramp
Generator
VREF AGND AVCC
VREF AV
CC
Power Supply
Zero Detect
COSC
ROSC
BYPASS
ZERO
VDD
DGND
VCLAMP
BSN
PVCC
OUTN
PGND
BSP
OUTP
PGND
PVCC
TPA3200D1
SLOS442A – MAY 2005 – REVISED JULY 2005
Functional Block Diagram
5