Texas Instruments TPA3200D1 - Manual (Page 16)

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REGISTER CONTROL
OVERSAMPLING RATE CONTROL
VCOM OUTPUT
TPA3200D1
SLOS442A – MAY 2005 – REVISED JULY 2005
The digital functions of the TPA3200D1 are controlled by 4 terminals. Table 2 shows selectable data formats,
Table 3 shows de-emphasis control, Table 4 shows mute control, and Table 5 shows channel-output select.
Table 2. Data Format Select
FMT (PIN 43) DATA FORMAT
LOW 16- to 24-bit, I 2 S format
HIGH 16-bit right-justified
Table 3. De-Emphasis Control
DEMP (PIN 41 ) DE-EMPHASIS FUNCTION
LOW 44.1 kHz de-emphasis OFF
HIGH 44.1 kHz de-emphasis ON
Table 4. Mute Control
MUTE (PIN 42 ) MUTE
LOW Mute OFF
HIGH Mute ON
Table 5. Channel Output Select
LR_SEL (PIN 7 ) ACTIVE CHANNEL (1)
LOW Right
HIGH Left
(1) A digital data stream consists of two channels of data. In an I 2 S or
right-justified data stream, the left-channel data precedes the
right-channel data (See
Figure 20 ). The LR_SEL input selects the
channel to send to the mono output.
The TPA3200D1 automatically controls the oversampling rate of the delta-sigma D/A converters with the system
clock rate. The oversampling rate is set to 64× oversampling with every system clock and sampling frequency.
One unbuffered common-mode voltage output pin, VCOM (pin 10) is brought out for decoupling purposes. This
pin is nominally biased to a dc voltage level equal to 0.5 × V
DD
. This pin cannot be used to bias external circuits.
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