Texas Instruments TPA3200D1 - Manual (Page 22)

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POWER SUPPLY DECOUPLING
BSN AND BSP CAPACITORS
BSN AND BSP RESISTORS
VCLAMP CAPACITOR
MIDRAIL BYPASS CAPACITOR
VREF DECOUPLING CAPACITOR
SWITCHING FREQUENCY
f
s +
6.6
R
OSC
C
OSC (5)
TPA3200D1
SLOS442A – MAY 2005 – REVISED JULY 2005
The typical output voltage, measured across the load, is also given in Table 6 at each of the gain steps. This is
the expected voltage with a full scale input signal applied at the digital inputs and V
DD
= 5 V. This voltage scales
proportionally with a lower or higher V
DD
. For example, if V
DD
= 4.5 V, scale the results in Table 6 by 4.5/5, or
0.9.
The differential offset voltage, measured across the speaker outputs, increases as the gain is increased. For the
lowest offset voltage, specified in the electrical characteristics table, set the gain at the lowest step, 12 dB.
The TPA3200D1 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling
to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is
achieved by using two capacitors of different types that target different types of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR)
ceramic capacitor, typically 1 µF placed as close as possible to the device V
CC
lead works best. For filtering
lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the audio
power amplifier is recommended.
The full H-bridge output stage uses only NMOS transistors. It therefore requires bootstrap capacitors for the high
side of each output to turn on correctly. A 0.22-µF ceramic capacitor, rated for at least 25 V, must be connected
from each output to its corresponding bootstrap input. Specifically, one 0.22-µF capacitor must be connected
from OUTP to BSP, and one 0.22-µF capacitor must be connected from OUTN to BSN.
To limit the current when charging the bootstrap capacitors, a resistor with a value of approximately 50
Ω
(+/–10% maximum) must be placed in series with each bootstrap capacitor. The current will be limited to less
than 500 µA.
To ensure that the maximum gate-to-source voltage for the NMOS output transistors is not exceeded, an internal
regulator clamps the gate voltage. A 1-µF capacitor must be connected from VCLAMP (pin 15) to ground. This
capacitor must have a rating of V
CC
or more. The voltage at VCLAMP (pin 15) varies with V
CC
and may not be
used for powering any other circuitry.
The midrail bypass capacitor is the most critical capacitor and serves several important functions. During start-up
or recovery from shutdown mode, C
(BYPASS)
determines the rate at which the amplifier starts up. The second
function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This
noise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and
THD+N.
The VREF terminal (pin 34) is the output of an internally-generated 5-V supply, used for the oscillator and gain
setting logic. It requires a 0.1-µF to 1-µF capacitor to ground to keep the regulator stable. The regulator may not
be used to power any additional circuitry.
The switching frequency is determined using the values of the components connected to ROSC (pin 31) and
COSC (pin 32) and may be calculated using
Equation 5 :
The frequency may be varied from 225 kHz to 275 kHz by adjusting the values chosen for ROSC and COSC.
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