Ricoh R5C841 - Manual (Page 41)

R5C841 PCI-CardBus/IEEE 1394/SD Card/Memory Stick/xD/ExpressCard Data Sheet
12345  2004 R EV .1.10 4-16
4.16.4 LINK
The Link module sends packets which appear at the transmit FIFO interfaces to the PHY, and
places correctly addressed packets into the receive FIFO. The features are as follows.
⋅ Transmits and receives correctly formatted 1394 serial bus packets.
⋅ Generates the appropriate acknowledge for all received asynchronous packets.
⋅ Performs the cycle master function.
⋅ Generates and checks 32-bit CRC.
⋅ Detects missing cycle start packets.
⋅ Interfaces to PHY.
⋅ Receives isochronous packets at all times (Supports of asynchronous streams and cycle start
packets including a CRC error).
⋅ Ignores asynchronous packets received during the isochronous phase.
4.17 SD Card Interface
The R5C841 has one port of SD Card interface, consists of four serial data lines, one serial
command line, card detection, write protection and SD clock.
4.17.1 Protocol
After the SD Card interface block in the R5C841 is initialized, the R5C841 outputs the data
through the serial SDCMD signal by the host’s command (Writing into the SD_CMD register), and
the SD Card’s response to the command is inputted to the SDCMD signal. The contents of this
card’s response are stored into bits [7:0] of the SD_RSP register. The SD Card is initialized after
the SD Card interface block checked CRC, etc. After that, the data is transmitted between the
R5C841 and the SD Card through the data lines. When the data is written into the SD memory
card, the host writes the divided data (default 512byte) into the SD buffer of SD interface block,
and the R5C841 transmits the serialized data from the SDDAT [3:0] of SD Interface block.
Conversely, when the data is read from the SD memory card, the SD Card writes the divided data
(default 512byte) into the SDDAT [3:0] of SD interface block after initialization of the SD Card by
the command response signal.
4.18 Memory Stick Interface
The R5C841 has one port of Memory Stick interface, consists of four serial data lines, one bus
state line, card detection and MS clock.
4.18.1 Protocol
The Memory Stick interface block accesses to the Memory Stick registers and the Page Buffer by
the Transfer Protocol Command (TPC) in compliance with the host. The R5C841 checks
transmission of data between the Page Buffer in the Memory Stick and the Flash Memory and a
status after accepting INT signal of the Memory Stick. After that, the R5C841 starts to read / write
/ erase the data.
4.19 xD Picture Card Interface
The R5C841 has one port of xD Picture Card interface, consists of eight serial data lines, seven
control signals and card detection.