beautypg.com

15 poewr up/down sequence – Ricoh R5C841 User Manual

Page 39

background image

R5C841 PCI-CardBus/IEEE 1394/SD Card/Memory Stick/xD/ExpressCard Data Sheet

12345

2004

R

EV

.1.10

4-14

2. Copy of the Subsystem ID and the Subsystem Vendor ID in PCI user defined space

method.

Card:

C0h,

C2h

1394/SD/MS/xD: ACh, AEh

3. Load the Subsystem IDs from the Serial ROM method.

Connecting SPKROUT to pull-down enables to use the Serial ROM. The R5C841 has

the Serial ROM interface, and load the Subsystem ID and the Subsystem Vendor ID

after PCI reset disabled.

These registers are initialized only by GBRST#.

4.15 Power Up/Down Sequence

Follow the sequence when the power sequence is ON/OFF.

On the power sequence is ON.

1. Supply to VCC_ RIN and VCC_ROUT*.

2. Supply to VCC_3V, VCC_MD3V and AVCC_PHY3V.

3. Supply to VCC_PCI3V.

On the power sequence is OFF.

1. Stop supplying to VCC_PCI3V.

2. Stop supplying to VCC_3V, VCC_MD3V and AVCC_PHY3V.

3. Stop supplying to VCC_RIN and VCC_ROUT*.

*: in case of an internal regulator disabled

On the power sequence is on, sustain to timing of Global Reset (Chapter 5.3.6) in regards to the

control of HWSPND# and GBRST#. GBRST# must be specially asserted on the power supply to

AVCC_PHY3V, because the only GBRST# enables to initialize the Cable interface block.The

rising of VCC_PCI3V should be within HWSPND# asserted time. When the power sequence is

off, the special limit for Delay Time is none.

The R5C841 can operate the PHY as Repeater. Follow the power sequence when the R5C841

operates PHY as Repeater without providing VCC_PCI3V.

On the power sequence is ON.

1. Supply to VCC_ RIN and VCC_ROUT*.

2. Supply to VCC_3V, VCC_MD3V, and AVCC_PHY3V.

On the power sequence is OFF.

1. Stop supplying to VCC_3V, VCC_MD3V, and AVCC_PHY3V.

2. Stop supplying to VCC_ RIN and VCC_ROUT*.

*: in case of an internal regulator disabled

In this case also, the special limit for delay time is none on the power sequence is off. Note the

following.

a. Asserting GBRST# enables to supply power to AVCC_PHY3V, because the only

GBRST# enables to initialize Cable interface. Also, sustain the delay time shown in

the chapter 5.3.6 on use of GBRST#.

b. HWSPND# is always set to ‘Low’.