Ricoh R5C841 - Manual (Page 26)

R5C841 PCI-CardBus/IEEE 1394/SD Card/Memory Stick/xD/ExpressCard Data Sheet
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4 F UNCTIONAL D ESCRIPTION
4.1 Device Configuration
The R5C841 supports PCI-CardBus Bridge Interface functions for the PC Card socket, the
PCI-IEEE1394 bridge function, the SD Card interface, the Memory Stick interface and the xD
Picture Card interface. Logically the R5C841 looks to the primary PCI as a separate secondary
bus residing in a single device. The PC Card, the IEEE 1394, the SD Card, the Memory Stick and
the xD Picture Card have their own register spaces.
4.1.1 PCI Configuration Register Space
The PCI Configuration registers are used to control the basic operations, as settings and status
control of the PCI device. Each function has 256 byte of configuration space.
4.1.2 CardBus (32-bit) Card Control Register Space
The CardBus Card Control registers are used to manage status changed events, remote wakeup
events and status information about the PC Card in the socket. These registers are used for PC
Card-32 as well as PC Card-16. The PC Card Control Register Base Address register points to
the 4 Kbyte memory mapped I/O space that contains both the PC Card-32 and PC Card-16
Status and Control registers. Socket Status/Control Registers for Card-32 are placed in the lower
2Kbyte of the 4Kbyte and start at offset 000h.
4.1.3 16-bit Card Control Register Space
The Socket Status/Control Registers for the PC Card-16 are placed in the upper 2Kbyte of the
4Kbyte pointed by the PC Card Control Register Base Address register and start at offset 800h.
4.1.4 16-bit Legacy Port
Legacy mode allows all 16-bit Card Control registers to be accessed through the index/data port
at I/O address 3E0/3E2 in order to maintain the backward compatibility like the Ricoh
RF5C396/366 that is the Intel 82365-compatible device.
4.1.5 1394 OHCI-LINK Register Space
The 1394 OHCI-LINK registers are 2Kbyte of register compliant with the 1394 OHCI
specifications. The 1394 OHCI Register Base Address register points to the 2Kbyte memory
mapped I/O space. These registers are used to control OHCI-LINK and to set DMA context.
4.1.6 1394 PHY Register Space
The 1394 PHY registers are compliant with the IEEE1394a-2000 standard specifications. These
registers are used to set the PHY block (ex. the value of Gap count.) and are accessed through
the PHY Control register in the 1394 OHCI-LINK register space.
4.1.7 SD Card Control Register Space
The SD Card Control registers, compliant with the SD Host Controller Standard specification, are
256byte of register assigned to control the SD card. These registers are used to set for access to
the SD card, to give commands and to read/write data. These are placed in the memory mapped
I/O space by the SD Card Register Base Address register.