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User-defined i/o resources, Device-embedded logic and processing, Reconfigurable i/o architecture – National Instruments NI 781xR User Manual

Page 13: Figure 1-1. high-level fpga functional overview, Reconfigurable i/o architecture -4

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Chapter 1

Introduction

NI 781xR User Manual

1-4

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reconfigure the device in another application for four independent timed
loops with separate I/O resources.

User-Defined I/O Resources

You can create your own custom measurements using the fixed I/O
resources. For example, one application might require an event counter that
increments when a rising edge appears on any of three digital input lines.
You can implement these behaviors in the hardware for fast, deterministic
performance.

Device-Embedded Logic and Processing

You can implement LabVIEW logic and processing on the FPGA of the
R Series device. Typical logic functions include Boolean operations,
comparisons, and basic mathematical operations. You can implement
multiple functions efficiently in the same design, operating sequentially or
in parallel. You also can implement more complex algorithms such as
control loops. You are limited only by the size of the FPGA.

Reconfigurable I/O Architecture

Figure 1-1 shows an FPGA connected to fixed I/O resources and a bus
interface.

Figure 1-1. High-Level FPGA Functional Overview

FPGA

Bus Interface

Fixed I/O Resource

Fixed I/O Resource

Fixed I/O Resource

Fixed I/O Resource