NEC switch - Manual (Page 44)

CHAPTER 3 CPU ARCHITECTURE
User’s Manual U12978EJ3V0UD
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3.2.3 Special function registers (SFRs)
Unlike general-purpose registers, each special function register has a special function.
The special function registers are allocated in the 256-byte area FF00H to FFFFH.
The special function registers can be manipulated, like the general-purpose registers, with operation, transfer, and
bit manipulation instructions. Manipulatable bit units (1, 8, and 16) differ depending on the special function register
type.
Each manipulation bit can be specified as follows.
• 1-bit manipulation
Describe the symbol reserved by the assembler for the 1-bit manipulation instruction operand (sfr.bit). This
manipulation can also be specified using address.
• 8-bit manipulation
Describe the symbol reserved by the assembler for the 8-bit manipulation instruction operand (sfr). This
manipulation can also be specified using an address.
• 16-bit manipulation
Describe the symbol reserved by the assembler for the 16-bit manipulation instruction operand. When
specifying an address, describe an even address.
Table 3-2 lists the special function registers. The meanings of the symbols in this table are as follows.
• Symbol
Indicates the address of the implemented special function register. The symbols shown in this column are
reserved words in the assembler, and have already been defined in the header file “sfrbit.h” in the C compiler.
Therefore, these symbols can be used as instruction operands if an assembler or integrated debugger is used.
• R/W
Indicates whether the special function register in question can be read or written.
R/W: Read/write
R: Read only
W: Write only
• Bit units for manipulation
Indicates the bit units (1, 8, 16) in which the special function register in question can be manipulated.
• After reset
Indicates the status of the special function register when the RESET signal is input.