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NEC switch User Manual

Page 204

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CHAPTER 15 INSTRUCTION SET

User’s Manual U12978EJ3V0UD

204

Mnemonic

Operands

Bytes

Clocks

Operation

Flag

Z AC CY

SUBC

A,#byte

2

4

A,CY

← A−byte−CY

Ч Ч Ч

saddr,#byte

3

6

(saddr),CY

← (saddr)−byte−CY

Ч Ч Ч

A,r

2

4

A,CY

← A−r−CY

Ч Ч Ч

A,saddr

2

4

A,CY

← A−(saddr)−CY

Ч Ч Ч

A,!addr16

3

8

A,CY

← A−(addr16)−CY

Ч Ч Ч

A,[HL]

1

6

A,CY

← A−(HL)−CY

Ч Ч Ч

A,[HL+byte]

2

6

A,CY

← A−(HL+byte)−CY

Ч Ч Ч

AND

A,#byte

2

4

A

← A∧byte

×

saddr,#byte

3

6

(saddr)

← (saddr)∧byte

×

A,r

2

4

A

← A∧r

×

A,saddr

2

4

A

← A∧(saddr)

×

A,!addr16

3

8

A

← A∧(addr16)

×

A,[HL]

1

6

A

← A∧(HL)

×

A,[HL+byte]

2

6

A

← A∧(HL+byte)

×

OR

A,#byte

2

4

A

← A∨byte

×

saddr,#byte

3

6

(saddr)

← (saddr)∨byte

×

A,r

2

4

A

← A∨r

×

A,saddr

2

4

A

← A∨(saddr)

×

A,!addr16

3

8

A

← A∨(addr16)

×

A,[HL]

1

6

A

← A∨(HL)

×

A,[HL+byte]

2

6

A

← A∨(HL+byte)

×

XOR

A,#byte

2

4

A

← AVbyte

×

saddr,#byte

3

6

(saddr)

← (saddr)Vbyte

×

A,r

2

4

A

← AVr

×

A,saddr

2

4

A

← AV(saddr)

×

A,!addr16

3

8

A

← AV(addr16)

×

A,[HL]

1

6

A

← AV(HL)

×

A,[HL+byte]

2

6

A

← AV(HL+byte)

×

Remark

One instruction clock cycle is one CPU clock cycle (f

CPU

) selected by the processor clock control

register (PCC).