National Instruments 5411 - Manual (Page 28)

Chapter 4 Arb Operation
© National Instruments Corporation 4-3 DAQArb 5411 User Manual
Figure 4-2. Waveform Data Path Block Diagram
Update Rate
On the DAQArb 5411, the high-speed DAC itself is always updated at
80 MHz but the maximum update clock for waveform memory is
40 MHz. The update clock for the waveform memory can be further
divided by a 16-bit counter, as shown in Figure 4-2. Therefore, the
slowest update rate is 40 MHz divided by 65,536, which is 610.35 Hz.
Note: For DDS mode, you should always keep the update rate at 40 MHz.
Doing this will yield the best performance of the combination of DDS,
digital filter, DAC, and analog filter.
Arb Mode
The Arb mode of waveform generation uses a separate waveform
memory for storing multiple waveform buffers. This mode also uses a
FIFO memory for storing the staging list, which contains the buffer
linking and looping information. This FIFO is referred to as an
instruction FIFO.
ARB Memory
DDS Lookup
Memory
DDS
Digital Filter
Filter
MUX
A
B
12
DAC Register
80 MHz Oscillator Div/2
DAC 12
16 Bits
12 Bits
Digital Filter
Enable
16-Bit
Counter
Mode Select