Patton electronic 3060/V24 - Manual (Page 19)

3060/V24
102001UA
A-3 A PPENDIX
P ATTON E LECTRONICS C O . I NSTALLATION A ND O PERATIONS M ANUAL
Master DCE / Sub-Channel DTE Interface Flow Diagram
Master DCE / Sub-Channel DCE Interface Flow Diagram
Pin 15 TXC
Pin 17 RXC
Pin 24 ETXC
Pin 15 TXC
Pin 17 RXC
Pin 24 ETXC
Master RX Clock
Selection Logic
Master TX Clock
Selection Logic
Pin 20 DTR Pin 20 DTR
Master Port is a DCE
Pin 2 TXD Pin 3 RXD
Pin 3 RXD Pin 2 TXD
Pin 4 RTS
Pin 5 CTS
Pin 6 DSR
Pin 8 DCD
Pin 4 RTS
Pin 5 CTS
Pin 6 DSR
Pin 8 DCD
Switch Control
+8v
Channel Port is a DCE
+8v
Clk In Clk Out
Pin 15 TXC
Pin 17 RXC
Pin 24 ETXC
Pin 15 TXC
Pin 17 RXC
Pin 24 ETXC
Master RX Clock
Selection Logic
Master TX Clock
Selection Logic
Pin 20 DTR
Pin 20 DTR
Master Port is a DCE
Pin 2 TXD
Pin 2 TXD
Pin 3 RXD
Pin 3 RXD
Pin 4 RTS
Pin 5 CTS
Pin 6 DSR
Pin 8 DCD
Pin 4 RTS
Pin 5 CTS
Pin 6 DSR
Pin 8 DCD
+8v
Switch Control
Channel Port is a DTE
+8v
Buffer