PC Concepts SHG2 DP - Manual (Page 3)

Intel® SHG2 DP Server Board Technical Product Specification Table of Contents
Revision 1.0 Intel Order Number C11343-001 iii
Table of Contents
1. Introduction............................................................................................................ 1
1.1 SHG2 Architecture Overview............................................................................... 2
1.2 Document Structure and Outline ......................................................................... 4
2. Processor and Chipset ......................................................................................... 6
2.1 Overview.............................................................................................................. 6
2.2 Processor Support............................................................................................... 6
2.2.1 Processor Bus Termination/Regulation/Power .............................................. 7
2.2.2 Miscellaneous Processor Subsystem Logic................................................... 7
2.2.3 Server Management Registers and Sensors ................................................. 7
2.2.4 ServerWorks* Grand Champion* LE Chipset ................................................ 8
2.2.5 CMIC-LE .................................................................................................... 8
2.3 Memory Subsystem............................................................................................. 9
2.3.1 Chipkill* .......................................................................................................... 9
2.3.2 Memory Configuration.................................................................................... 9
2.3.3 CIOB-X2 ................................................................................................... 11
2.4 CSB5 South Bridge ........................................................................................... 11
2.4.1 PCI Interface ................................................................................................ 12
2.4.2 PCI Bus Master IDE Interface...................................................................... 12
2.4.3 USB Interface .............................................................................................. 12
2.4.4 BIOS Flash .................................................................................................. 12
2.4.5 Compatibility Interrupt Control ..................................................................... 12
2.4.6 Power Management ........................................................................................ 13
2.4.7 General Purpose Input and Output Pins ...................................................... 13