SUPER MICRO Computer X7SBL-LN1/LN2 - Manual (Page 72)

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X7SBL-LN1/LN2 User's Manual
to write data back directly from the buffer without writing data to the System
Memory for fast CPU.
Cache Extended Memory
If enabled, this feature will allow the data stored in the extended memory area to
be cached (written) into a buffer, a storage area in the Static DROM (SDROM)
or written into L1, L2, L3 cache inside the CPU to speed up CPU operations.
Select Uncached to disable this function. Select Write Through to allow data
to be cached into the buffer and written into the system memory at the same
time. Select Write Protect to prevent data from being written into the extended
memory area above 1 MB. Select Write Back to allow the CPU to write data
back directly from the buffer without writing data to the System Memory for fast
CPU data processing and operation. The options are Uncached, Write Through,
Write Protect, and Write Back.
PNP Confi guration
Access the submenu to make changes to the following settings for PNP (Play &
Plug) devices.
PCI32 Slot#1 - PCI32 Slot#2
Access the submenu for each of the settings above to make changes to the fol-
lowing:
Option ROM Scan
When enabled, this setting will initialize the device expansion ROM. The options
are Enabled and Disabled.
Enable Master
This setting allows you to enable the selected device as the PCI bus master.
The options are Enabled and Disabled.
Latency Timer
This setting allows you to set the clock rate for Bus Master. A high-priority, high-
throughout device may benefi t from a greater clock rate. The options are Default,