SMC Networks SMC91C95 - Manual (Page 59)

59
I/O SPACE - BANK2
OFFSET NAME TYPE SYMBOL
4 FIFO PORTS REGISTER READ ONLY FIFO
This register provides access to the read ports of the Receive FIFO and the Transmit completion FIFO. The
packet numbers to be processed by the interrupt service routines are read from this register.
HIGH
BYTE
REMPT
Y
RX FIFO PACKET NUMBER
1 0 0 0 0 0 0 0
LOW
BYTE
TEMPT
Y
TX DONE PACKET NUMBER
1 0 0 0 0 0 0 0
REMPTY - No receive packets queued in the RX
FIFO. For polling purposes, uses the RCV_INT bit
in the Interrupt Status Register.
TOP OF RX FIFO PACKET NUMBER - Packet
number presently at the output of the RX FIFO.
Only valid if REMPTY is clear. The packet is
removed from the RX FIFO using MMU
Commands 3) or 4).
TEMPTY - No transmit packets in completion
queue. For polling purposes, uses the TX_INT bit
in the Interrupt Status Register.
TX DONE PACKET NUMBER - Packet number
presently at the output of the TX Completion FIFO.
Only valid if TEMPTY is clear. The packet is
removed when a TX INT acknowledge is issued.
NOTE: For software compatibility with future
versions, the value read from each FIFO register is
intended to be written into the PNR as is, without
masking higher bits (provided TEMPTY and
REMPTY = 0 respectively).