Spectrum Brands Quad C6x VME64 - Manual (Page 33)

Spectrum Signal Processing Monaco Technical Reference
Global Shared Bus
Part Number 500-00191 21
Revision 2.00
Although this is a non-prioritized scheme, the back-off function of the SCV64 interface
resolves collisions between a bus master and the VMEbus if there is contention for the
VMEbus.
Note: There are no ownership timers for the Hurricane or SCV64. If the
Hurricane holds the bus too long the VME bus could timeout.
3.2.3. Locked Cycles
A ‘C6x can lock the Global Shared Bus in order to perform Read-Modify-Write (RMW)
or other atomic accesses to it, by driving its Timer 0 (TOUT0) low. After the TOUT0 is
driven low, the next access to the Global Shared Bus acquires the bus. The bus is not
released until the ‘C6x drives the Timer 0 (TOUT0) pin high.
Caution: The capability of locking the Global Shared Bus from a ‘C6x should
be used carefully because other devices will not acquire the bus once it is locked.
This capability is intended for read-modify-write accesses to the Global Shared
RAM and registers. It is highly recommended that Bus locking not be used. It
can lead to a deadlock condition, and in particular, result in debugger timeouts.
The following precautions should be observed when locking the Global Shared Bus:
1. VME bus timeouts can occur because the SCV64 cannot access the board while a
‘C6x has locked the bus.
2. If node A accesses the DSP~LINK3 interface while it has locked the Global Shared
Bus by asserting TOUT0, the bus will be released. Node A’s next access to the bus
will re-lock it to node A, providing that TOUT0 is still asserted.
3. Some SCV64 inbound cycles can occur while the bus is locked. If a ‘C6x has locked
the bus and is performing a VME outbound cycle while a VME inbound cycle is in
progress, the ‘C6x will be temporarily backed off and the SCV64 cycle will proceed.
The Global Shared Bus will be returned to that ‘C6x node after the SCV64 cycle
finishes. No other ‘C6x will get ownership of the bus.
4. If a debugger is being used when one processor has the bus locked for an extended
time while another processor is trying to get the bus, the debugger may timeout.