Example – Intel ARCHITECTURE IA-32 User Manual
Page 557

Mathematics of Prefetch Scheduling Distance
E
E-11
memory to you cannot do much about it. Typically, data copy from one
space to another space, for example, graphics driver moving data from
writeback memory to write-combining memory, belongs to this
category, where performance advantage from prefetch instructions will
be marginal.
Example
As an example of the previous cases consider the following conditions
for computation latency and the memory throughput latencies. Assume
T
l
= 18 and T
b
= 8 (in front side bus cycles).
See also other documents in the category Intel Computer Accessories:
- RAID AXXRSBBU6 (14 pages)
- IA-32 (636 pages)
- Evaluation Platform Board Manual RN (88 pages)
- ZT8101 (124 pages)
- CELERON 200 (53 pages)
- 210T (24 pages)
- AXXSW1GB (220 pages)
- I/O Controller Hub 6300ESB (14 pages)
- D15343-003 (166 pages)
- 1520 (176 pages)
- SR1450 (87 pages)
- 410 (60 pages)
- 460T (150 pages)
- SBC-455 (97 pages)
- cPCI-7200 (71 pages)
- 82600 (40 pages)
- 4.0A (10 pages)
- CONTROLLERS 413808 (824 pages)
- IXM5414E (294 pages)
- 520T (31 pages)
- NuPRO-850 (50 pages)
- Ethernet Switch Boards (52 pages)
- Express Hub (4 pages)
- SGI Altix 450 (198 pages)
- OPEN (660) 120/140/150 II (160 pages)
- 130T (18 pages)
- Express 100BASE-T4 (43 pages)
- PCI-7200 (65 pages)
- NetStructure 470 (155 pages)
- EXPRESS 330T (16 pages)
- TOUCH-N-MOW 120000 (12 pages)
- ETX CD (91 pages)
- SRW224P (2 pages)
- 410T (40 pages)