Intel ARCHITECTURE IA-32 - Manual (Page 492)

IA-32 Intel® Architecture Optimization
B-38
Bus Writes
Underway from
the processor
7
This is an accrued
sum of the durations
of all write
transactions by this
processor. Divide by
“Writes from the
Processor” to get bus
write request latency.
Also Beware of
different recipes in
mask bits for
Pentium 4 and Intel
Xeon processors
between CPUID
model field value of 2
and model value less
than 2. IOQ_active_entries 1a. ReqA0 ,
ALL_WRITE , OWN
(CPUID model <
2);
1b. ReqA0 ,
ALL_WRITE,
MEM_WB, MEM_WT,
MEM_WP, MEM_WC,
MEM_UC , OWN
(CPUID model >=
2).
Bus Accesses
Underway from
All Agents
7
This is an accrued
sum of the durations
of entries by all
agents on the bus.
Divide by “Bus
Accesses from All
Agents” to get bus
request latency. Also
Beware of different
recipes in mask bits
for Pentium 4 and
Intel Xeon
processors between
CPUID model field
value of 2 and model
value less than 2. IOQ_active_entries 1a. ReqA0 ,
ALL_READ ,
ALL_WRITE , OWN,
OTHER, PREFETCH
(CPUID model <
2); 1b.ReqA0,
ALL_READ ,
ALL_WRITE,
MEM_WB, MEM_WT,
MEM_WP, MEM_WC,
MEM_UC , OWN,
OTHER , PREFETCH
(CPUID model >=
2).
continued
Table B-1 Pentium 4 Processor Performance Metrics (continued)
Metric Description
Event Name or Metric
Expression Event Mask Value
Required