Interphase Tech 4538 - Manual (Page 45)

Chapter 1: Hardware Description
4538 Hardware Reference Manual 23
Figure 1-4. Local Space Access From PCI Memory Space
When the processor is running, the PCI bus can access all the elements connected to the
local bus, except the FLASH boot memory. The accessible elements are the main SDRAM
memory (the processor’s SDRAM memory controller must be initialized), the processor
Q8DÃ76S!
Q8DÃ76S"
3&, 0HPRU\ 6SDFH
/RFDO 0HPRU\ 6SDFH
Q fUD fU699S
Q fUDfU699S
G‚phyÃhqq r††
Q8DÃhqq r††Ã2
Q8DÃ76S!Ã
ÃG‚phyÃ6qq r††
ÃÃQ fUDfU699S
!ÃH7
†r‡ÃvÃQ fUDf8UG
Q8DÃhqq r††
G‚phyÃhqq r††
Q8DÃ76S!
Th€rÉhyˆr
Q fUDfU699S
"
% $
"
"
"
Xvq‚Ã†v“rÆr‡ÃvÃQ fUDf8UGÃ7T
$ !ÃH7
†r‡ÃvÃQ fUD f8UG
! !
! !
! !
! !
‘
‘AAAAAAAA
G‚phyÃ6qq r††ÃiˆvyqvtÃr‘h€ƒyrÐv‡uÃQ8D ÃUh tr‡ÃD€htrÃ