Sundance SMT166 - Manual (Page 39)

Interface Signal / Bus FPGA Pin #
SLB1 DAIP/N[0:7] AL30/AM31 AN32/AM32 AL31/AK31 AJ29/AJ30
AF26/AE26 AH29/AH30 AF28/AF29 AE28/AE29
DBIP/N[0:7] AP32/AP33 AM33/AL33 AK33/AK32 AJ31/AJ32
AN33/AN34 AL34/AK34 AJ34/AH34
AH33/AH32
DAQP/N[0:7] AE21/AD21 AG22/AH22 AK22/AJ22 AC20/AD20
AF19/AE19 AJ20/AH20 AC19/AD19 AK21/AJ21
DBQP/N[0:7] AM18/AL18 AP19/AN18 AN19/AN20
AM20/AL20 AF20/AF21 AM21/AL21 AM23/AL23
AM22/AN22
CKOUTIP/N AG27/AG28
CKOUTQP/N AF30/AG30
RSLCLKP/N AP20/AP21
SYSCLKP/N AK19/AL19
DooRIP/N AE27/AD27
DooRQP/N AG20/AG21
ExtTrigIP/N AD25/AD26
ExtTrigQP/N AP22/AN23
SIGNAL[0:11] AL28 AN28 AH25 AN27 AK27 AH23 AK28 AM28
AJ25 AM27 AJ27 AH24
CNTRL[0:8] AG25 AP30 AG26 AP31 AK26 AL26 AJ24 AJ26
AM26
SMB CLK:AM30 DATA:AN30 ALERT:AH28
Misc SerNum:AH27 PSEN0:AL29 PSEN1:AK29
MODE0:AN29 MODE1:AP29
DooR is Data out of Range.
Two independent channels I and Q.
Product Specification SMT166 Page 39 of 44 Last Edited: 17/06/2014 16:12:00