Document Outline

• Revision History
• Imprint
• Disclaimer
• Table of Contents
• List of Tables
  • 1-1 System Relevant Information 1 - 5
  • 1-2 AM4120 Main Specifications 1 - 9
  • 1-3 Standards 1 - 12
  • 1-4 Related Publications 1 - 13
  • 2-1 Features of the Processors Supported on the AM4120 2 - 4
  • 2-2 Module Management LED Functions 2 - 7
  • 2-3 User-Specific LED Functions 2 - 8
  • 2-4 MSPP80 Register Sequence 2 - 9
  • 2-5 MSPP80 Register Example 2 - 9
  • 2-6 Module Handle Positions 2 - 10
  • 2-7 Debug Connector J6 Pinout 2 - 11
  • 2-8 Serial Con. J4 (SER0) Pinout 2 - 12
  • 2-9 GbE Connectors J2 / J3 Pinout 2 - 13
  • 2-10 Pinout of AMC Card-edge Connector J1 2 - 17
  • 2-11 Reserved Pins Description 2 - 21
  • 2-12 Extended Options Region Single-Ended Pins Description 2 - 21
  • 2-13 JTAG Pins Description 2 - 21
  • 2-14 Processor and Chipset Supervision 2 - 23
  • 2-15 AMC-Specific Signals 2 - 23
  • 2-16 Onboard Power Supply Supervision 2 - 23
  • 2-17 Temperature Signals 2 - 23
  • 4-1 DIP Switch SW2 Functions 4 - 3
  • 4-2 DIP Switch SW3 Functions 4 - 4
  • 4-4 AM4120 Virtual and Physical Memory Map 4 - 5
  • 4-5 I/O Address Map 4 - 6
  • 4-6 Mode SP Port 80 Register (MSPP80) 4 - 7
  • 4-7 Status Register 0 (STAT0) 4 - 7
  • 4-8 Control Register 1 (CTRL1) 4 - 8
  • 4-9 Device Protection Register (DPROT) 4 - 8
  • 4-10 Reset Status Register (RSTAT) 4 - 9
  • 4-11 Board Interrupt Configuration Register (BICFG) 4 - 10
  • 4-12 Board ID High Byte Register (BIDH) 4 - 10
  • 4-13 Board and PLD Revision Register (BREV) 4 - 11
  • 4-14 Geographic Addressing Register (GEOAD) 4 - 11
  • 4-15 Watchdog Timer Control Register (WTIM) 4 - 13
  • 4-16 Board ID Low Byte Register (BIDL) 4 - 14
  • 4-17 User-Specific LED Configuration Register (LCFG) 4 - 15
  • 4-18 User-Specific LED Control Register (LCTRL) 4 - 16
  • 5-1 DC Operational Input Voltage Ranges 5 - 3
  • 5-2 AM4120 in U-Boot Shell Mode 5 - 5
  • 5-3 AM4120 with Linux in Idle Mode 5 - 5
  • 5-4 AM4120 with Linux and Maximum Processor Work Load (hackbench) 5 - 5
  • 5-5 Payload Power Consumption of AM4120 Accessories 5 - 5
  • 5-6 IPMI FRU Payload Power Consumption 5 - 6
  • 5-7 Payload Start-Up Current of the AM4120 5 - 6
  • 6-1 AM4120 Airflow Impedance by Zone [N/m²] 6 - 7
  • 6-2 AM4120 Airflow Impedance by Zone [inches H2O] 6 - 8
  • 6-3 Deviation of the Airflow Rate of an AM4120 6 - 9
• List of Figures
  • 1-1 AM4120 Functional Block Diagram 1 - 6
  • 1-2 AM4120 Front Panel 1 - 7
  • 1-3 AM4120 Board Layout (Top View) 1 - 8
  • 1-4 AM4120 Board Layout (Bottom View) 1 - 8
  • 2-1 Front Panel LEDs 2 - 6
  • 2-2 Module Handle Positions 2 - 10
  • 2-3 Debug Connector J6 2 - 11
  • 2-4 Serial Con. J4 (SER0) 2 - 12
  • 2-5 GbE Con. J2/J3 2 - 13
  • 2-6 AM4120 Port Mapping 2 - 15
  • 3-1 Module Handle Positions 3 - 4
  • 3-2 J9 microSDHC Memory Card Socket 3 - 8
  • 4-1 DIP Switches SW2 and SW3 4 - 3
  • 4-2 Jumpers R346 and R362 4 - 4
  • 6-1 AM4120 with QorIQ P2020, 1.2 GHz 6 - 5
  • 6-2 AM4120 with QorIQ P2020, 1.0 GHz 6 - 6
  • 6-3 AM4120 Airflow Impedance 6 - 7
  • 6-4 Thermal Zones of the AM4120 Module 6 - 8
• Proprietary Note
• Trademarks
• Environmental Protection Statement
• Explanation of Symbols
• For Your Safety
  • High Voltage Safety Instructions
  • Special Handling and Unpacking Instructions
  • General Instructions on Usage
• Two Year Warranty
• 1. Introduction
  • 1.1 Board Overview
  • 1.2 Board-Specific Information
  • 1.3 System Relevant Information
  • 1.4 Board Diagrams
    • 1.4.1 Functional Block Diagram
    • 1.4.2 Front Panel
    • 1.4.3 Board Layouts
  • 1.5 Technical Specification
  • 1.6 Standards
  • 1.7 Related Publications
• 2. Functional Description
  • 2.1 Processor
  • 2.2 Memory
  • 2.3 Timer
  • 2.4 Watchdog Timer
  • 2.5 Power Monitor and Reset Generation
  • 2.6 FLASH Memory
    • 2.6.1 SPI NOR FLASH for U-Boot
    • 2.6.2 Parallel NAND Flash
    • 2.6.3 Parallel NOR Flash
  • 2.7 System Data and User Data EEPROMs
  • 2.8 MRAM Memory
  • 2.9 microSDHC Mass Storage
  • 2.10 Board Interfaces
    • 2.10.1 Front Panel LEDs
    • 2.10.2 Module Handle
    • 2.10.3 General Purpose DIP Switches
    • 2.10.4 Debug Interfaces
    • 2.10.5 Serial Ports
    • 2.10.6 Serial Rapid I/O
    • 2.10.7 PCI Express Interfaces
    • 2.10.8 Gigabit Ethernet Interfaces
  • 2.11 AMC Interconnection
    • 2.11.1 Fabric Interface
    • 2.11.2 Synchronization Clock Interface
    • 2.11.3 System Management Interface
    • 2.11.4 JTAG Interface
    • 2.11.5 Module Power Interface
    • 2.11.6 Pinout of AMC Card-edge Connector J1
  • 2.12 Module Management
    • 2.12.1 Module Management Controller
    • 2.12.2 MMC Signals Implemented on the AM4120
• 3. Installation
  • 3.1 Safety Requirements
  • 3.2 Module Handle Positions
  • 3.3 Hot Swap Procedures
    • 3.3.1 Hot Swap Insertion
    • 3.3.2 Hot Swap Extraction
  • 3.4 Installation of microSDHC Memory Cards
  • 3.5 Software Installation
• 4. Configuration
  • 4.1 DIP Switch Configuration
  • 4.2 SRIO Speed Configuration
  • 4.3 Memory Address Mapping
  • 4.4 I/O Address Map
  • 4.5 AM4120 Specific Registers
    • 4.5.1 Mode SP Port 80 Register (MSPP80)
    • 4.5.2 Status Register 0 (STAT0)
    • 4.5.3 Control Register 1 (CTRL1)
    • 4.5.4 Device Protection Register (DPROT)
    • 4.5.5 Reset Status Register (RSTAT)
    • 4.5.6 Board Interrupt Configuration Register (BICFG)
    • 4.5.7 Board ID High Byte Register (BIDH)
    • 4.5.8 Board and PLD Revision Register (BREV)
    • 4.5.9 Geographic Addressing Register (GEOAD)
    • 4.5.10 Watchdog Timer Control Register (WTIM)
    • 4.5.11 Board ID Low Byte Register (BIDL)
    • 4.5.12 User-Specific LED Configuration Register (LCFG)
    • 4.5.13 User-Specific LED Control Register (LCTRL)
    • 4.5.14 IPMI Keyboard Controller Style Interface
• 5. Power Considerations
  • 5.1 AM4120 Voltage Ranges
  • 5.2 Carrier Power Requirements
    • 5.2.1 Payload Power
    • 5.2.2 Payload and MMC Voltage Ramp
    • 5.2.3 Module Management Power Consumption
    • 5.2.4 Power Sequencing for Unmanaged Systems
  • 5.3 Payload Power Consumption of the AM4120
    • 5.3.1 Payload Power Consumption with COM Port on Front I/O
    • 5.3.2 Payload Power Consumption of AM4120 Accessories
  • 5.4 IPMI FRU Payload Power Consumption
  • 5.5 Payload Start-Up Current of the AM4120
• 6. Thermal Considerations
  • 6.1 Board Thermal Monitoring
  • 6.2 System Airflow
    • 6.2.1 Thermal Characteristic Diagrams for the AM4120
    • 6.2.2 Airflow Impedance
    • 6.2.3 Airflow Paths