EVGA NFORCE 680I SLI 122-CK-NF68-XX - Manual (Page 164)

On-board LED Codes
113
Code(hex) Name Description
18 InitCPU CPU ID and initialize L1/L2 cache
19 Reserved
1A Reserved
1B
Setup Interrupt Initialize first 120 interrupt vectors Vector Table with
SPURIOUS_INT_HDLR and initialize INT 00h-1Fh
according to INT_TBL
1C CMOS Battery Check Test CMOS and check Battery Fail
1D Early PM Early PM
initialization
1E Reserved
1F Re-initial KB Load keyboard matrix
20 Reserved
21 HPM init Init Heuristic Power Management (HPM)
22 Reserved
23 Program chipset Early Programming of chipset registers
24 Init PNP Init PNP
25 Shadow VBIOS Shadow system/video BIOS
26 Clock Gen Init onboard clock generator and sensor
27 Setup BDA Setup BIOS DATA AREA (BDA)
28 Reserved
29 CPU Speed detect Chipset programming and CPU Speed detect
2A Reserved
2B Init video Initialize Video
2C Reserved
2D Video memory test Test Video Memory and display Logos
2E Reserved
2F Reserved
30 Reserved
31 Reserved
32 Reserved
33 Early keyboard reset Early Keyboard Reset
34 Reserved
35 Test DMA Controller
0 Test DMA channel 0
36 Reserved
37 Test DMA Controller Test DMA channel 1