Architecture description, Dsps – Sundance SMT374 User Manual
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Version 2.2
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SMT374 User Manual
Architecture Description
DSPs
The two Texas Instruments DSPs can run up to 300MHz. Each of them is doted of
128MB of Synchronous DRAM (SDRAM).
The DSPs can be of two types:
• TMS320C6211 or C6711
This is a fixed-point digital signal processor provided by Texas Instruments. The
processor will run with zero wait states from internal SRAM. The internal memory
is 64KB in size and can be partitioned between normal SRAM and L2 cache.
A 37.5MHz on-board crystal oscillator provides the clock used for the DSP which
then multiplies this by four internally. So the DSPs run at 150MHz.
• TMS320C6713
The processor will run with zero wait states from internal SRAM. The internal
memory is 256KB in size and can be partitioned between normal SRAM and L2
cache.
A 37.5MHz on-board crystal oscillator provides the clock used for the DSP which
then multiplies this by a programmable amount internally to provide the required
core and EMIF clocks. In this case the DSPs will run at 225MHz.
• TMS320C6713-300
The processor will run with zero wait states from internal SRAM. The internal
memory is 256KB in size and can be partitioned between normal SRAM and L2
cache.
A 50MHz on-board crystal oscillator provides the clock used for the DSP which
then multiplies this by a programmable amount internally to provide the required
core and EMIF clocks. In this case the DSPs will run at 300MHz.
Remark: SMT374_300 built before june 2006 may be fitted with a 37.5MHz
instead of a 50MHz crystal oscillator. The DSPs will then run at 225MHz with the
default bootloader. The SMT374_300 can be programmed with a “special”
bootloader to make the DSPs run at 300MHz. Sundance will provide this “special”
bootloader on demand: