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Fpga prog pin control (jp3 connector), Fpga jtag – Sundance SMT374 User Manual

Page 27

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Version 2.2

Page 27 of 29

SMT374 User Manual

This standard is implemented using

SAMTEC QSTRIP

0.50mm Hi-speed connectors.

To improve electrical performances, a ground plane is embedded in each QSTRIP
connector.

For long distances micro-coax ribbon cable is used to connect 2 QSTRIP connectors.

An SHB interface can be 8, 16 or 32-bit wide.

FPGA PROG Pin Control (JP3 connector)

In

PROG asserted

Out

PROG under control of DSP

FPGA JTAG

The following shows the pin-outs for JP4 (FPGA) JTAG connector:

The JTAG chain includes the FPGA and the CPLD (XC9636XL).

1 2 3 4 5 6

V33

TCK

GND

TMS

TDO

TDI